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-rw-r--r--src/mainboard/lenovo/t430s/devicetree.cb4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb
index e2ae392de3..af3de6c96d 100644
--- a/src/mainboard/lenovo/t430s/devicetree.cb
+++ b/src/mainboard/lenovo/t430s/devicetree.cb
@@ -67,6 +67,10 @@ chip northbridge/intel/sandybridge
register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
+ register "xhci_switchable_ports" = "0xf"
+ register "superspeed_capable_ports" = "0xf"
+ register "xhci_overcurrent_mapping" = "0x4000201"
+
# Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "1"
register "c2_latency" = "101" # c2 not supported