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-rw-r--r--src/mainboard/lenovo/t400/Makefile.inc1
-rw-r--r--src/mainboard/lenovo/t400/blc.c38
2 files changed, 39 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t400/Makefile.inc b/src/mainboard/lenovo/t400/Makefile.inc
index 3aa94b59d2..8ac61bbb77 100644
--- a/src/mainboard/lenovo/t400/Makefile.inc
+++ b/src/mainboard/lenovo/t400/Makefile.inc
@@ -18,3 +18,4 @@ romstage-y += dock.c
ramstage-y += dock.c
ramstage-y += cstates.c
romstage-y += hybrid_graphics.c
+ramstage-y += blc.c
diff --git a/src/mainboard/lenovo/t400/blc.c b/src/mainboard/lenovo/t400/blc.c
new file mode 100644
index 0000000000..01f34c1c46
--- /dev/null
+++ b/src/mainboard/lenovo/t400/blc.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 arthur@aheymans.xyz
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <commonlib/helpers.h>
+#include <northbridge/intel/gm45/gm45.h>
+
+static const struct blc_pwm_t blc_entries[] = {
+ /* Vendor BIOS seems to intend to set PWM freq at 220Hz */
+ /* T400 */
+ {"B141EW04 V7 ", 110},
+ {"LP141WX3-TLR1", 110},
+ {"LP141WX5-TLP2", 450},
+ {"LTN141AT12401", 450},
+ {"LTN141W1-L05", 110},
+ {"LTN141WD-L05", 110},
+ /* T500 */
+ {"LP154W02-TL06", 110},
+ {"LTN154P3-L02", 110},
+};
+
+int get_blc_values(const struct blc_pwm_t **entries)
+{
+ *entries = blc_entries;
+ return ARRAY_SIZE(blc_entries);
+}