diff options
Diffstat (limited to 'src/mainboard/lenovo/l520/devicetree.cb')
| -rw-r--r-- | src/mainboard/lenovo/l520/devicetree.cb | 174 |
1 files changed, 174 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/l520/devicetree.cb b/src/mainboard/lenovo/l520/devicetree.cb new file mode 100644 index 0000000000..221168028a --- /dev/null +++ b/src/mainboard/lenovo/l520/devicetree.cb @@ -0,0 +1,174 @@ +chip northbridge/intel/sandybridge + register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }" + register "gfx.link_frequency_270_mhz" = "0" + register "gfx.ndid" = "3" + register "gfx.use_spread_spectrum_clock" = "0" + register "gpu_cpu_backlight" = "0x00000000" + register "gpu_dp_b_hotplug" = "0" + register "gpu_dp_c_hotplug" = "0" + register "gpu_dp_d_hotplug" = "0" + register "gpu_panel_port_select" = "0" + register "gpu_panel_power_backlight_off_delay" = "0" + register "gpu_panel_power_backlight_on_delay" = "0" + register "gpu_panel_power_cycle_delay" = "0" + register "gpu_panel_power_down_delay" = "0" + register "gpu_panel_power_up_delay" = "0" + register "gpu_pch_backlight" = "0x00000000" + + # Override fuse bits that hard-code the value to 666 Mhz + register "max_mem_clock_mhz" = "933" + + device cpu_cluster 0x0 on + chip cpu/intel/socket_rPGA989 + device lapic 0x0 on + end + end + chip cpu/intel/model_206ax + register "c1_acpower" = "1" + register "c1_battery" = "1" + register "c2_acpower" = "3" + register "c2_battery" = "3" + register "c3_acpower" = "5" + register "c3_battery" = "5" + device lapic 0xacac off + end + end + end + + device domain 0x0 on + device pci 00.0 on # Host bridge Host bridge + subsystemid 0x17aa 0x21dd + end + device pci 01.0 on # PCIe Bridge for discrete graphics + end + device pci 02.0 on # Internal graphics VGA controller + subsystemid 0x17aa 0x21dd + end + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + register "c2_latency" = "0x0065" + register "docking_supported" = "1" + register "gen1_dec" = "0x007c1611" + register "gen2_dec" = "0x00040069" + register "gen3_dec" = "0x000c0701" + register "gen4_dec" = "0x00000000" + register "gpi13_routing" = "2" + register "gpi6_routing" = "2" + register "p_cnt_throttling_supported" = "1" + register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 1, 0, 0, 0 }" + register "pcie_port_coalesce" = "1" + register "sata_interface_speed_support" = "0x3" + register "sata_port_map" = "0x3b" + device pci 16.0 on # Management Engine Interface 1 + subsystemid 0x17aa 0x21dd + end + device pci 16.1 off # Management Engine Interface 2 + end + device pci 16.2 off # Management Engine IDE-R + end + device pci 16.3 off # Management Engine KT + end + device pci 19.0 off # Intel Gigabit Ethernet + end + device pci 1a.0 on # USB2 EHCI #2 + subsystemid 0x17aa 0x21dd + end + device pci 1b.0 on # High Definition Audio Audio controller + subsystemid 0x17aa 0x21dd + end + device pci 1c.0 on # PCIe Port #1 + subsystemid 0x17aa 0x21dd + end + device pci 1c.1 on # PCIe Port #2 + subsystemid 0x17aa 0x21dd + end + device pci 1c.2 on # PCIe Port #3 + subsystemid 0x17aa 0x21dd + end + device pci 1c.3 on # PCIe Port #4 + subsystemid 0x17aa 0x21dd + end + device pci 1c.4 on # PCIe Port #5 + subsystemid 0x17aa 0x21dd + end + device pci 1c.5 on # PCIe Port #6 + subsystemid 0x17aa 0x21dd + end + device pci 1c.6 off # PCIe Port #7 + end + device pci 1c.7 off # PCIe Port #8 + end + device pci 1d.0 on # USB2 EHCI #1 + subsystemid 0x17aa 0x21dd + end + device pci 1e.0 off # PCI bridge + end + device pci 1f.0 on # LPC bridge PCI-LPC bridge + subsystemid 0x17aa 0x21dd + chip ec/lenovo/pmh7 + register "backlight_enable" = "0x01" + register "dock_event_enable" = "0x01" + device pnp ff.1 on # dummy + end + end + chip ec/lenovo/h8 + register "config0" = "0xa7" + register "config1" = "0x09" + register "config2" = "0xa0" + register "config3" = "0xc2" + + register "beepmask0" = "0x00" + register "beepmask1" = "0x86" + register "has_power_management_beeps" = "0" + register "event2_enable" = "0xff" + register "event3_enable" = "0xff" + register "event4_enable" = "0xff" + register "event5_enable" = "0xff" + register "event6_enable" = "0xff" + register "event7_enable" = "0xff" + register "event8_enable" = "0xff" + register "event9_enable" = "0xff" + register "eventa_enable" = "0xff" + register "eventb_enable" = "0xff" + register "eventc_enable" = "0xff" + register "eventd_enable" = "0xff" + register "evente_enable" = "0xff" + + device pnp ff.2 on # dummy + io 0x60 = 0x62 + io 0x62 = 0x66 + io 0x64 = 0x1600 + io 0x66 = 0x1604 + end + end + end + device pci 1f.2 on # SATA Controller 1 + subsystemid 0x17aa 0x21dd + end + device pci 1f.3 on # SMBus + subsystemid 0x17aa 0x21dd + chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip + device i2c 54 on + end + device i2c 55 on + end + device i2c 56 on + end + device i2c 57 on + end + device i2c 5c on + end + device i2c 5d on + end + device i2c 5e on + end + device i2c 5f on + end + end + end + device pci 1f.5 off # SATA Controller 2 + end + device pci 1f.6 off # Thermal + end + end + end +end |