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-rw-r--r--src/mainboard/kontron/Kconfig1
-rw-r--r--src/mainboard/kontron/kt690/Kconfig124
-rw-r--r--src/mainboard/kontron/kt690/Makefile.inc64
-rw-r--r--src/mainboard/kontron/kt690/devicetree.cb6
4 files changed, 192 insertions, 3 deletions
diff --git a/src/mainboard/kontron/Kconfig b/src/mainboard/kontron/Kconfig
index 152e9491d1..81e4b9e8c0 100644
--- a/src/mainboard/kontron/Kconfig
+++ b/src/mainboard/kontron/Kconfig
@@ -3,5 +3,6 @@ choice
depends on VENDOR_KONTRON
source "src/mainboard/kontron/986lcd-m/Kconfig"
+source "src/mainboard/kontron/kt690/Kconfig"
endchoice
diff --git a/src/mainboard/kontron/kt690/Kconfig b/src/mainboard/kontron/kt690/Kconfig
new file mode 100644
index 0000000000..dc20ecc7ac
--- /dev/null
+++ b/src/mainboard/kontron/kt690/Kconfig
@@ -0,0 +1,124 @@
+config BOARD_KONTRON_KT690
+ bool "KT690"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_S1G1
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_AMD_RS690
+ select SOUTHBRIDGE_AMD_SB600
+ select SUPERIO_WINBOND_W83627DHG
+ select HAVE_PIRQ_TABLE
+ select HAVE_MP_TABLE
+ select HAVE_MAINBOARD_RESOURCES
+ select GFXUMA
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select IOAPIC
+ select HAVE_ACPI_TABLES
+
+config MAINBOARD_DIR
+ string
+ default kontron/kt690
+ depends on BOARD_KONTRON_KT690
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x1488
+ depends on BOARD_KONTRON_KT690
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x6900
+ depends on BOARD_KONTRON_KT690
+
+config LB_CKS_RANGE_START
+ int
+ default 49
+ depends on BOARD_KONTRON_KT690
+
+config APIC_ID_OFFSET
+ hex
+ default 0x0
+ depends on BOARD_KONTRON_KT690
+
+config VIDEO_MB
+ int
+ default 1
+ depends on BOARD_KONTRON_KT690
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_KONTRON_KT690
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_KONTRON_KT690
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "KT690"
+ depends on BOARD_KONTRON_KT690
+
+config HEAP_SIZE
+ hex
+ default 0x8000
+ depends on BOARD_KONTRON_KT690
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_KONTRON_KT690
+
+config MAX_CPUS
+ int
+ default 2
+ depends on BOARD_KONTRON_KT690
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+ depends on BOARD_KONTRON_KT690
+
+config HAVE_OPTION_TABLE
+ bool
+ default n
+ depends on BOARD_KONTRON_KT690
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_KONTRON_KT690
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 1
+ depends on BOARD_KONTRON_KT690
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ bool
+ default y
+ depends on BOARD_KONTRON_KT690
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x1
+ depends on BOARD_KONTRON_KT690
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_KONTRON_KT690
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_KONTRON_KT690
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_KONTRON_KT690
diff --git a/src/mainboard/kontron/kt690/Makefile.inc b/src/mainboard/kontron/kt690/Makefile.inc
new file mode 100644
index 0000000000..0a2460d166
--- /dev/null
+++ b/src/mainboard/kontron/kt690/Makefile.inc
@@ -0,0 +1,64 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
+ iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
+ mv $(obj)/dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/kontron/kt690/devicetree.cb b/src/mainboard/kontron/kt690/devicetree.cb
index b68bbbced6..e26350ccda 100644
--- a/src/mainboard/kontron/kt690/devicetree.cb
+++ b/src/mainboard/kontron/kt690/devicetree.cb
@@ -2,7 +2,7 @@
#Define vga_rom_address = 0xfff0000
#Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
#Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
-# 1: the system allows a PCIE link to be established on Dev2 or Dev3.
+# 1: the system allows a PCIE link to be established on Dev2 or Dev3.
#Define gfx_dual_slot, 0: single slot, 1: dual slot
#Define gfx_lane_reversal, 0: disable lane reversal, 1: enable
#Define gfx_tmds, 0: didn't support TMDS, 1: support
@@ -106,10 +106,10 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0xa10
end
device pnp 2e.c off # PECI, SST
- endif
-
+ end
end #superio/winbond/w83627dhg
#chip superio/smsc/fdc37n972
+ # seems this chip is not used?
#end
end #LPC
device pci 14.4 on end # PCI 0x4384
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 21:53:34 +0000