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path: root/src/mainboard/jetway/pa78vm5/romstage.c
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Diffstat (limited to 'src/mainboard/jetway/pa78vm5/romstage.c')
-rw-r--r--src/mainboard/jetway/pa78vm5/romstage.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index 35596424e1..ac66ada06f 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -229,8 +229,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
rs780_before_pci_init();
sb7xx_51xx_before_pci_init();
- timestamp_add_now(TS_END_ROMSTAGE);
-
post_code(0x42);
post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
post_code(0x43); // Should never see this post code.