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-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/mainboard.c20
1 files changed, 0 insertions, 20 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
index 4b22afe088..54c83b49c4 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
@@ -26,9 +26,6 @@
#include <southbridge/amd/cimx/cimx_util.h>
#include <northbridge/amd/agesa/family14/pci_devs.h>
-void set_pcie_reset(void);
-void set_pcie_dereset(void);
-
/***********************************************************
* These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.
* This table is responsible for physically routing the PIC and
@@ -123,23 +120,6 @@ static void pirq_setup(void)
picr_data_ptr = mainboard_picr_data;
}
-/**
- * TODO
- * SB CIMx callback
- */
-void set_pcie_reset(void)
-{
-}
-
-/**
- * TODO
- * mainboard specific SB CIMx callback
- */
-void set_pcie_dereset(void)
-{
-}
-
-
/**********************************************
* Enable the dedicated functions of the board.
**********************************************/