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-rw-r--r--src/mainboard/iwill/dk8_htx/romstage.c3
-rw-r--r--src/mainboard/iwill/dk8s2/romstage.c3
-rw-r--r--src/mainboard/iwill/dk8x/romstage.c3
3 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index 36a350b3c1..fb5a6b5474 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -1,8 +1,5 @@
#define SET_NB_CFG_54 1
-//used by incoherent_ht
-//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c
index 5c9d8251d6..39f60e006e 100644
--- a/src/mainboard/iwill/dk8s2/romstage.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
@@ -1,8 +1,5 @@
#define SET_NB_CFG_54 1
-//used by incoherent_ht
-//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c
index 5c9d8251d6..39f60e006e 100644
--- a/src/mainboard/iwill/dk8x/romstage.c
+++ b/src/mainboard/iwill/dk8x/romstage.c
@@ -1,8 +1,5 @@
#define SET_NB_CFG_54 1
-//used by incoherent_ht
-//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0