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-rw-r--r--src/mainboard/iwill/dk8_htx/romstage.c6
-rw-r--r--src/mainboard/iwill/dk8s2/romstage.c6
-rw-r--r--src/mainboard/iwill/dk8x/romstage.c6
3 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index da0cc57af7..76af51a762 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -10,9 +10,9 @@
//#define K8_ALLOCATE_IO_RANGE 1
//used by init_cpus and fidvid
-#define K8_SET_FIDVID 0
+#define SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
-#define K8_SET_FIDVID_CORE0_ONLY 1
+#define SET_FIDVID_CORE0_ONLY 1
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
@@ -188,7 +188,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* it will set up chains and store link pair for optimization later */
ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
-#if K8_SET_FIDVID == 1
+#if SET_FIDVID == 1
{
msr_t msr;
diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c
index 537d987f6a..ea4eefafb4 100644
--- a/src/mainboard/iwill/dk8s2/romstage.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
@@ -10,9 +10,9 @@
//#define K8_ALLOCATE_IO_RANGE 1
//used by init_cpus and fidvid
-#define K8_SET_FIDVID 0
+#define SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
-#define K8_SET_FIDVID_CORE0_ONLY 1
+#define SET_FIDVID_CORE0_ONLY 1
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
@@ -188,7 +188,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* it will set up chains and store link pair for optimization later */
ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
-#if K8_SET_FIDVID == 1
+#if SET_FIDVID == 1
{
msr_t msr;
diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c
index 537d987f6a..ea4eefafb4 100644
--- a/src/mainboard/iwill/dk8x/romstage.c
+++ b/src/mainboard/iwill/dk8x/romstage.c
@@ -10,9 +10,9 @@
//#define K8_ALLOCATE_IO_RANGE 1
//used by init_cpus and fidvid
-#define K8_SET_FIDVID 0
+#define SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
-#define K8_SET_FIDVID_CORE0_ONLY 1
+#define SET_FIDVID_CORE0_ONLY 1
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
@@ -188,7 +188,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* it will set up chains and store link pair for optimization later */
ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
-#if K8_SET_FIDVID == 1
+#if SET_FIDVID == 1
{
msr_t msr;