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-rw-r--r--src/mainboard/iwill/Kconfig11
-rw-r--r--src/mainboard/iwill/dk8_htx/Kconfig109
-rw-r--r--src/mainboard/iwill/dk8_htx/Makefile.inc90
-rw-r--r--src/mainboard/iwill/dk8s2/Kconfig109
-rw-r--r--src/mainboard/iwill/dk8s2/Makefile.inc53
-rw-r--r--src/mainboard/iwill/dk8x/Kconfig108
-rw-r--r--src/mainboard/iwill/dk8x/Makefile.inc52
7 files changed, 531 insertions, 1 deletions
diff --git a/src/mainboard/iwill/Kconfig b/src/mainboard/iwill/Kconfig
index 792d600548..cfb986f7eb 100644
--- a/src/mainboard/iwill/Kconfig
+++ b/src/mainboard/iwill/Kconfig
@@ -1 +1,10 @@
-#
+choice
+ prompt "Mainboard model"
+ depends on VENDOR_IWILL
+
+source "src/mainboard/iwill/dk8_htx/Kconfig"
+source "src/mainboard/iwill/dk8s2/Kconfig"
+source "src/mainboard/iwill/dk8x/Kconfig"
+
+endchoice
+
diff --git a/src/mainboard/iwill/dk8_htx/Kconfig b/src/mainboard/iwill/dk8_htx/Kconfig
new file mode 100644
index 0000000000..ace16502be
--- /dev/null
+++ b/src/mainboard/iwill/dk8_htx/Kconfig
@@ -0,0 +1,109 @@
+config BOARD_IWILL_DK8_HTX
+ bool "DK8-HTX"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_940
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_AMD_AMD8111
+ select SOUTHBRIDGE_AMD_AMD8131
+ select SUPERIO_WINBOND_W83627HF
+ select HAVE_PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select IOAPIC
+ select AP_CODE_IN_CAR
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select WAIT_BEFORE_CPUS_INIT
+ select HAVE_ACPI_TABLES
+
+config MAINBOARD_DIR
+ string
+ default iwill/dk8_htx
+ depends on BOARD_IWILL_DK8_HTX
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on BOARD_IWILL_DK8_HTX
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+ depends on BOARD_IWILL_DK8_HTX
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_IWILL_DK8_HTX
+
+config APIC_ID_OFFSET
+ hex
+ default 0x8
+ depends on BOARD_IWILL_DK8_HTX
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_IWILL_DK8_HTX
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_IWILL_DK8_HTX
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "DK8-HTX"
+ depends on BOARD_IWILL_DK8_HTX
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_IWILL_DK8_HTX
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_IWILL_DK8_HTX
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_IWILL_DK8_HTX
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_IWILL_DK8_HTX
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_IWILL_DK8_HTX
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x6
+ depends on BOARD_IWILL_DK8_HTX
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0xa
+ depends on BOARD_IWILL_DK8_HTX
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_IWILL_DK8_HTX
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_IWILL_DK8_HTX
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_IWILL_DK8_HTX
diff --git a/src/mainboard/iwill/dk8_htx/Makefile.inc b/src/mainboard/iwill/dk8_htx/Makefile.inc
new file mode 100644
index 0000000000..6135e90b5a
--- /dev/null
+++ b/src/mainboard/iwill/dk8_htx/Makefile.inc
@@ -0,0 +1,90 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
+
+# ./ssdt.o is in northbridge/amd/amdk8/Config.lb
+obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt2.o
+obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt3.o
+obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt4.o
+obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt5.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
+ iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
+ mv dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
+ iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl
+ perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex
+ mv pci2.hex ssdt2.c
+
+$(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl"
+ iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
+ perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
+ mv pci3.hex ssdt3.c
+
+$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
+ iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
+ perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
+ mv pci4.hex ssdt4.c
+
+$(obj)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci5.asl"
+ iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci5.asl
+ perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex
+ mv pci5.hex ssdt5.c
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/iwill/dk8s2/Kconfig b/src/mainboard/iwill/dk8s2/Kconfig
new file mode 100644
index 0000000000..32d2a2783a
--- /dev/null
+++ b/src/mainboard/iwill/dk8s2/Kconfig
@@ -0,0 +1,109 @@
+config BOARD_IWILL_DK8S2
+ bool "DK8S2"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_940
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_AMD_AMD8111
+ select SOUTHBRIDGE_AMD_AMD8131
+ select SUPERIO_WINBOND_W83627HF
+ select HAVE_PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select IOAPIC
+ select AP_CODE_IN_CAR
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select WAIT_BEFORE_CPUS_INIT
+ select ATI_RAGE_XL
+
+config MAINBOARD_DIR
+ string
+ default iwill/dk8s2
+ depends on BOARD_IWILL_DK8S2
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on BOARD_IWILL_DK8S2
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+ depends on BOARD_IWILL_DK8S2
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_IWILL_DK8S2
+
+config APIC_ID_OFFSET
+ hex
+ default 0x8
+ depends on BOARD_IWILL_DK8S2
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_IWILL_DK8S2
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_IWILL_DK8S2
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "DK8S2"
+ depends on BOARD_IWILL_DK8S2
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_IWILL_DK8S2
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_IWILL_DK8S2
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_IWILL_DK8S2
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_IWILL_DK8S2
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_IWILL_DK8S2
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x6
+ depends on BOARD_IWILL_DK8S2
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0xa
+ depends on BOARD_IWILL_DK8S2
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_IWILL_DK8S2
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_IWILL_DK8S2
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_IWILL_DK8S2
diff --git a/src/mainboard/iwill/dk8s2/Makefile.inc b/src/mainboard/iwill/dk8s2/Makefile.inc
new file mode 100644
index 0000000000..0f9bd727b6
--- /dev/null
+++ b/src/mainboard/iwill/dk8s2/Makefile.inc
@@ -0,0 +1,53 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/iwill/dk8x/Kconfig b/src/mainboard/iwill/dk8x/Kconfig
new file mode 100644
index 0000000000..a18152dc7b
--- /dev/null
+++ b/src/mainboard/iwill/dk8x/Kconfig
@@ -0,0 +1,108 @@
+config BOARD_IWILL_DK8X
+ bool "DK8X"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_940
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_AMD_AMD8111
+ select SOUTHBRIDGE_AMD_AMD8131
+ select SUPERIO_WINBOND_W83627THF
+ select HAVE_PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select IOAPIC
+ select AP_CODE_IN_CAR
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select WAIT_BEFORE_CPUS_INIT
+
+config MAINBOARD_DIR
+ string
+ default iwill/dk8x
+ depends on BOARD_IWILL_DK8X
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on BOARD_IWILL_DK8X
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+ depends on BOARD_IWILL_DK8X
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_IWILL_DK8X
+
+config APIC_ID_OFFSET
+ hex
+ default 0x8
+ depends on BOARD_IWILL_DK8X
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_IWILL_DK8X
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_IWILL_DK8X
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "DK8X"
+ depends on BOARD_IWILL_DK8X
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_IWILL_DK8X
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_IWILL_DK8X
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_IWILL_DK8X
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_IWILL_DK8X
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_IWILL_DK8X
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x6
+ depends on BOARD_IWILL_DK8X
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0xa
+ depends on BOARD_IWILL_DK8X
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_IWILL_DK8X
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_IWILL_DK8X
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_IWILL_DK8X
diff --git a/src/mainboard/iwill/dk8x/Makefile.inc b/src/mainboard/iwill/dk8x/Makefile.inc
new file mode 100644
index 0000000000..86d71e152b
--- /dev/null
+++ b/src/mainboard/iwill/dk8x/Makefile.inc
@@ -0,0 +1,52 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 08:55:59 +0000