diff options
Diffstat (limited to 'src/mainboard/iwill/dk8_htx/acpi')
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/amd8111.asl | 172 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl | 176 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/amd8111_pic.asl | 360 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/amd8131.asl | 119 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl | 114 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl | 114 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/amd8151.asl | 29 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl | 20 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/pci0_hc.asl | 2 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/pci2_hc.asl | 1 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/pci3_hc.asl | 1 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/pci4_hc.asl | 1 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/pci5_hc.asl | 1 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/acpi/superio.asl | 1 |
14 files changed, 1111 insertions, 0 deletions
diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8111.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8111.asl new file mode 100644 index 0000000000..19011dc47b --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/amd8111.asl @@ -0,0 +1,172 @@ +/* + * Copyright 2005 AMD + */ +//AMD8111 + Name (APIC, Package (0x04) + { + Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present + Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11}, + Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12}, + Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13} + }) + + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00}, + Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00}, + Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00}, + Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00} + }) + + Name (DNCG, Ones) + + Method (_PRT, 0, NotSerialized) + { + If (LEqual (^DNCG, Ones)) { + Store (DADD(\_SB.PCI0.SBDN, 0x0001ffff), Local0) + // Update the Device Number according to SBDN + Store(Local0, Index (DeRefOf (Index (PICM, 0)), 0)) + Store(Local0, Index (DeRefOf (Index (PICM, 1)), 0)) + Store(Local0, Index (DeRefOf (Index (PICM, 2)), 0)) + Store(Local0, Index (DeRefOf (Index (PICM, 3)), 0)) + + Store(Local0, Index (DeRefOf (Index (APIC, 0)), 0)) + Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0)) + Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0)) + Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0)) + + Store (0x00, ^DNCG) + + } + + If (LNot (PICF)) { + Return (PICM) + } + Else { + Return (APIC) + } + } + + Device (SBC3) + { + /* acpi smbus it should be 0x00040003 if 8131 present */ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(\_SB.PCI0.SBDN, 0x00010003)) + } + OperationRegion (PIRQ, PCI_Config, 0x56, 0x02) + Field (PIRQ, ByteAcc, Lock, Preserve) + { + PIBA, 8, + PIDC, 8 + } +/* + OperationRegion (TS3_, PCI_Config, 0xC4, 0x02) + Field (TS3_, DWordAcc, NoLock, Preserve) + { + PTS3, 16 + } +*/ + } + + Device (HPET) + { + Name (HPT, 0x00) + Name (_HID, EisaId ("PNP0103")) + Name (_UID, 0x00) + Method (_STA, 0, NotSerialized) + { + Return (0x0F) + } + + Method (_CRS, 0, NotSerialized) + { + Name (BUF0, ResourceTemplate () + { + Memory32Fixed (ReadWrite, 0xFED00000, 0x00000400) + }) + Return (BUF0) + } + } + + #include "amd8111_pic.asl" + + #include "amd8111_isa.asl" + + Device (TP2P) + { + /* 8111 P2P and it should 0x00030000 when 8131 present*/ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(\_SB.PCI0.SBDN, 0x00000000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x08, 0x03 }) } + Else { Return (Package (0x02) { 0x08, 0x01 }) } + } + + Device (USB0) + { + Name (_ADR, 0x00000000) + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x0F, 0x03 }) } + Else { Return (Package (0x02) { 0x0F, 0x01 }) } + } + } + + Device (USB1) + { + Name (_ADR, 0x00000001) + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x0F, 0x03 }) } + Else { Return (Package (0x02) { 0x0F, 0x01 }) } + } + } + + Name (APIC, Package (0x0C) + { + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, //USB + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 }, + + Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10 }, //Slot 6 + Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11 }, + Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12 }, + Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13 }, + + Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x11 }, //Slot 5 + Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x12 }, + Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 }, + Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 } + }) + + Name (PICM, Package (0x0C) + { + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //USB + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, + + Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //Slot 6 + Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, + + Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, //Slot 5 + Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 } + }) + + Method (_PRT, 0, NotSerialized) + { + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + } + diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl new file mode 100644 index 0000000000..9d93e34e92 --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl @@ -0,0 +1,176 @@ +/* + * Copyright 2005 AMD + */ +//AMD8111 isa + + Device (ISA) + { + /* lpc 0x00040000 */ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(\_SB.PCI0.SBDN, 0x00010000)) + } + + OperationRegion (PIRY, PCI_Config, 0x51, 0x02) // LPC Decode Registers + Field (PIRY, ByteAcc, NoLock, Preserve) + { + Z000, 2, // Parallel Port Range + , 1, + ECP, 1, // ECP Enable + FDC1, 1, // Floppy Drive Controller 1 + FDC2, 1, // Floppy Drive Controller 2 + Offset (0x01), + Z001, 3, // Serial Port A Range + SAEN, 1, // Serial Post A Enabled + Z002, 3, // Serial Port B Range + SBEN, 1 // Serial Post B Enabled + } + + Device (PIC) + { + Name (_HID, EisaId ("PNP0000")) + Name (_CRS, ResourceTemplate () + { + IO (Decode16, 0x0020, 0x0020, 0x01, 0x02) + IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02) + IRQ (Edge, ActiveHigh, Exclusive) {2} + }) + } + + Device (DMA1) + { + Name (_HID, EisaId ("PNP0200")) + Name (_CRS, ResourceTemplate () + { + IO (Decode16, 0x0000, 0x0000, 0x01, 0x10) + IO (Decode16, 0x0080, 0x0080, 0x01, 0x10) + IO (Decode16, 0x00C0, 0x00C0, 0x01, 0x20) + DMA (Compatibility, NotBusMaster, Transfer16) {4} + }) + } + + Device (TMR) + { + Name (_HID, EisaId ("PNP0100")) + Name (_CRS, ResourceTemplate () + { + IO (Decode16, 0x0040, 0x0040, 0x01, 0x04) + IRQ (Edge, ActiveHigh, Exclusive) {0} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00")) + Name (_CRS, ResourceTemplate () + { + IO (Decode16, 0x0070, 0x0070, 0x01, 0x06) + IRQ (Edge, ActiveHigh, Exclusive) {8} + }) + } + + Device (SPKR) + { + Name (_HID, EisaId ("PNP0800")) + Name (_CRS, ResourceTemplate () + { + IO (Decode16, 0x0061, 0x0061, 0x01, 0x01) + }) + } + + Device (COPR) + { + Name (_HID, EisaId ("PNP0C04")) + Name (_CRS, ResourceTemplate () + { + IO (Decode16, 0x00F0, 0x00F0, 0x01, 0x10) + IRQ (Edge, ActiveHigh, Exclusive) {13} + }) + } + + Device (SYSR) + { + Name (_HID, EisaId ("PNP0C02")) + Name (_UID, 0x00) + Name (SYR1, ResourceTemplate () + { + IO (Decode16, 0x04D0, 0x04D0, 0x01, 0x02) //wrh092302 - added to report Thor NVRAM + IO (Decode16, 0x1100, 0x117F, 0x01, 0x80) //wrh092302 - added to report Thor NVRAM + IO (Decode16, 0x1180, 0x11FF, 0x01, 0x80) + IO (Decode16, 0x0010, 0x0010, 0x01, 0x10) + IO (Decode16, 0x0022, 0x0022, 0x01, 0x1E) + IO (Decode16, 0x0044, 0x0044, 0x01, 0x1C) + IO (Decode16, 0x0062, 0x0062, 0x01, 0x02) + IO (Decode16, 0x0065, 0x0065, 0x01, 0x0B) + IO (Decode16, 0x0076, 0x0076, 0x01, 0x0A) + IO (Decode16, 0x0090, 0x0090, 0x01, 0x10) + IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E) + IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10) + IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error + IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error + }) + Method (_CRS, 0, NotSerialized) + { + Return (SYR1) + } + } + + Device (MEM) + { + Name (_HID, EisaId ("PNP0C02")) + Name (_UID, 0x01) + Method (_CRS, 0, NotSerialized) + { + Name (BUF0, ResourceTemplate () + { + Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF + Memory32Fixed (ReadWrite, 0x000C0000, 0x00000000) // video BIOS c0000-c8404 + Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC + Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM + Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC + Memory32Fixed (ReadWrite, 0xFFF80000, 0x00080000) // Overlay BIOS + Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS + Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS + Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS + Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS + }) + // Read the Video Memory length + CreateDWordField (BUF0, 0x14, CLEN) + CreateDWordField (BUF0, 0x10, CBAS) + + ShiftLeft (VGA1, 0x09, Local0) + Store (Local0, CLEN) + + Return (BUF0) + } + } + + Device (PS2M) + { + Name (_HID, EisaId ("PNP0F13")) + Name (_CRS, ResourceTemplate () + { + IRQNoFlags () {12} + }) + Method (_STA, 0, NotSerialized) + { + And (FLG0, 0x04, Local0) + If (LEqual (Local0, 0x04)) { Return (0x0F) } + Else { Return (0x00) } + } + } + + Device (PS2K) + { + Name (_HID, EisaId ("PNP0303")) + Name (_CRS, ResourceTemplate () + { + IO (Decode16, 0x0060, 0x0060, 0x01, 0x01) + IO (Decode16, 0x0064, 0x0064, 0x01, 0x01) + IRQNoFlags () {1} + }) + } + #include "superio.asl" + + } + diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8111_pic.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8111_pic.asl new file mode 100644 index 0000000000..228f3f84f1 --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/amd8111_pic.asl @@ -0,0 +1,360 @@ +/* + * Copyright 2005 AMD + */ +//AMD8111 pic LNKA B C D + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F")) + Name (_UID, 0x01) + Method (_STA, 0, NotSerialized) + { + And (\_SB.PCI0.SBC3.PIBA, 0x0F, Local0) + If (LEqual (Local0, 0x00)) { Return (0x09) } //Disabled + Else { Return (0x0B) } //Enabled + } + + Method (_PRS, 0, NotSerialized) + { + Name (BUFA, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) {3,5,10,11} + }) + Return (BUFA) + } + + Method (_DIS, 0, NotSerialized) + { + Store (0x01, Local3) + And (\_SB.PCI0.SBC3.PIBA, 0x0F, Local1) + Store (Local1, Local2) + If (LGreater (Local1, 0x07)) + { + Subtract (Local1, 0x08, Local1) + } + + ShiftLeft (Local3, Local1, Local3) + Not (Local3, Local3) + And (\_SB.PCI0.SBC3.PIBA, 0xF0, \_SB.PCI0.SBC3.PIBA) + } + + Method (_CRS, 0, NotSerialized) + { + Name (BUFA, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) {} + }) + CreateByteField (BUFA, 0x01, IRA1) + CreateByteField (BUFA, 0x02, IRA2) + Store (0x00, Local3) + Store (0x00, Local4) + And (\_SB.PCI0.SBC3.PIBA, 0x0F, Local1) + If (LNot (LEqual (Local1, 0x00))) + { // Routing enable + If (LGreater (Local1, 0x07)) + { + Subtract (Local1, 0x08, Local2) + ShiftLeft (One, Local2, Local4) + } + Else + { + If (LGreater (Local1, 0x00)) + { + ShiftLeft (One, Local1, Local3) + } + } + + Store (Local3, IRA1) + Store (Local4, IRA2) + } + + Return (BUFA) + } + + Method (_SRS, 1, NotSerialized) + { + CreateByteField (Arg0, 0x01, IRA1) + CreateByteField (Arg0, 0x02, IRA2) + ShiftLeft (IRA2, 0x08, Local0) + Or (Local0, IRA1, Local0) + Store (0x00, Local1) + ShiftRight (Local0, 0x01, Local0) + While (LGreater (Local0, 0x00)) + { + Increment (Local1) + ShiftRight (Local0, 0x01, Local0) + } + + And (\_SB.PCI0.SBC3.PIBA, 0xF0, \_SB.PCI0.SBC3.PIBA) + Or (\_SB.PCI0.SBC3.PIBA, Local1, \_SB.PCI0.SBC3.PIBA) + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F")) + Name (_UID, 0x02) + Method (_STA, 0, NotSerialized) + { + And (\_SB.PCI0.SBC3.PIBA, 0xF0, Local0) + If (LEqual (Local0, 0x00)) { Return (0x09) } + Else { Return (0x0B) } + } + + Method (_PRS, 0, NotSerialized) + { + Name (BUFB, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) {3,5,10,11} + }) + Return (BUFB) + } + + Method (_DIS, 0, NotSerialized) + { + Store (0x01, Local3) + And (\_SB.PCI0.SBC3.PIBA, 0xF0, Local1) + ShiftRight (Local1, 0x04, Local1) + Store (Local1, Local2) + If (LGreater (Local1, 0x07)) + { + Subtract (Local1, 0x08, Local1) + } + + ShiftLeft (Local3, Local1, Local3) + Not (Local3, Local3) + And (\_SB.PCI0.SBC3.PIBA, 0x0F, \_SB.PCI0.SBC3.PIBA) + } + + Method (_CRS, 0, NotSerialized) + { + Name (BUFB, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) {} + }) + CreateByteField (BUFB, 0x01, IRB1) + CreateByteField (BUFB, 0x02, IRB2) + Store (0x00, Local3) + Store (0x00, Local4) + And (\_SB.PCI0.SBC3.PIBA, 0xF0, Local1) + ShiftRight (Local1, 0x04, Local1) + If (LNot (LEqual (Local1, 0x00))) + { + If (LGreater (Local1, 0x07)) + { + Subtract (Local1, 0x08, Local2) + ShiftLeft (One, Local2, Local4) + } + Else + { + If (LGreater (Local1, 0x00)) + { + ShiftLeft (One, Local1, Local3) + } + } + + Store (Local3, IRB1) + Store (Local4, IRB2) + } + + Return (BUFB) + } + + Method (_SRS, 1, NotSerialized) + { + CreateByteField (Arg0, 0x01, IRB1) + CreateByteField (Arg0, 0x02, IRB2) + ShiftLeft (IRB2, 0x08, Local0) + Or (Local0, IRB1, Local0) + Store (0x00, Local1) + ShiftRight (Local0, 0x01, Local0) + While (LGreater (Local0, 0x00)) + { + Increment (Local1) + ShiftRight (Local0, 0x01, Local0) + } + + And (\_SB.PCI0.SBC3.PIBA, 0x0F, \_SB.PCI0.SBC3.PIBA) + ShiftLeft (Local1, 0x04, Local1) + Or (\_SB.PCI0.SBC3.PIBA, Local1, \_SB.PCI0.SBC3.PIBA) + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F")) + Name (_UID, 0x03) + Method (_STA, 0, NotSerialized) + { + And (\_SB.PCI0.SBC3.PIDC, 0x0F, Local0) + If (LEqual (Local0, 0x00)) { Return (0x09) } + Else { Return (0x0B) } + } + + Method (_PRS, 0, NotSerialized) + { + Name (BUFA, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) {3,5,10,11} + }) + Return (BUFA) + } + + Method (_DIS, 0, NotSerialized) + { + Store (0x01, Local3) + And (\_SB.PCI0.SBC3.PIDC, 0x0F, Local1) + Store (Local1, Local2) + If (LGreater (Local1, 0x07)) + { + Subtract (Local1, 0x08, Local1) + } + + ShiftLeft (Local3, Local1, Local3) + Not (Local3, Local3) + And (\_SB.PCI0.SBC3.PIDC, 0xF0, \_SB.PCI0.SBC3.PIDC) + } + + Method (_CRS, 0, NotSerialized) + { + Name (BUFA, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) {} + }) + CreateByteField (BUFA, 0x01, IRA1) + CreateByteField (BUFA, 0x02, IRA2) + Store (0x00, Local3) + Store (0x00, Local4) + And (\_SB.PCI0.SBC3.PIDC, 0x0F, Local1) + If (LNot (LEqual (Local1, 0x00))) + { + If (LGreater (Local1, 0x07)) + { + Subtract (Local1, 0x08, Local2) + ShiftLeft (One, Local2, Local4) + } + Else + { + If (LGreater (Local1, 0x00)) + { + ShiftLeft (One, Local1, Local3) + } + } + + Store (Local3, IRA1) + Store (Local4, IRA2) + } + + Return (BUFA) + } + + Method (_SRS, 1, NotSerialized) + { + CreateByteField (Arg0, 0x01, IRA1) + CreateByteField (Arg0, 0x02, IRA2) + ShiftLeft (IRA2, 0x08, Local0) + Or (Local0, IRA1, Local0) + Store (0x00, Local1) + ShiftRight (Local0, 0x01, Local0) + While (LGreater (Local0, 0x00)) + { + Increment (Local1) + ShiftRight (Local0, 0x01, Local0) + } + + And (\_SB.PCI0.SBC3.PIDC, 0xF0, \_SB.PCI0.SBC3.PIDC) + Or (\_SB.PCI0.SBC3.PIDC, Local1, \_SB.PCI0.SBC3.PIDC) + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F")) + Name (_UID, 0x04) + Method (_STA, 0, NotSerialized) + { + And (\_SB.PCI0.SBC3.PIDC, 0xF0, Local0) + If (LEqual (Local0, 0x00)) { Return (0x09) } + Else { Return (0x0B) } + } + + Method (_PRS, 0, NotSerialized) + { + Name (BUFB, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) {3,5,10,11} + }) + Return (BUFB) + } + + Method (_DIS, 0, NotSerialized) + { + Store (0x01, Local3) + And (\_SB.PCI0.SBC3.PIDC, 0xF0, Local1) + ShiftRight (Local1, 0x04, Local1) + Store (Local1, Local2) + If (LGreater (Local1, 0x07)) + { + Subtract (Local1, 0x08, Local1) + } + + ShiftLeft (Local3, Local1, Local3) + Not (Local3, Local3) + And (\_SB.PCI0.SBC3.PIDC, 0x0F, \_SB.PCI0.SBC3.PIDC) + } + + Method (_CRS, 0, NotSerialized) + { + Name (BUFB, ResourceTemplate () + { + IRQ (Level, ActiveLow, Shared) {} + }) + CreateByteField (BUFB, 0x01, IRB1) + CreateByteField (BUFB, 0x02, IRB2) + Store (0x00, Local3) + Store (0x00, Local4) + And (\_SB.PCI0.SBC3.PIDC, 0xF0, Local1) + ShiftRight (Local1, 0x04, Local1) + If (LNot (LEqual (Local1, 0x00))) + { + If (LGreater (Local1, 0x07)) + { + Subtract (Local1, 0x08, Local2) + ShiftLeft (One, Local2, Local4) + } + Else + { + If (LGreater (Local1, 0x00)) + { + ShiftLeft (One, Local1, Local3) + } + } + + Store (Local3, IRB1) + Store (Local4, IRB2) + } + + Return (BUFB) + } + + Method (_SRS, 1, NotSerialized) + { + CreateByteField (Arg0, 0x01, IRB1) + CreateByteField (Arg0, 0x02, IRB2) + ShiftLeft (IRB2, 0x08, Local0) + Or (Local0, IRB1, Local0) + Store (0x00, Local1) + ShiftRight (Local0, 0x01, Local0) + While (LGreater (Local0, 0x00)) + { + Increment (Local1) + ShiftRight (Local0, 0x01, Local0) + } + + And (\_SB.PCI0.SBC3.PIDC, 0x0F, \_SB.PCI0.SBC3.PIDC) + ShiftLeft (Local1, 0x04, Local1) + Or (\_SB.PCI0.SBC3.PIDC, Local1, \_SB.PCI0.SBC3.PIDC) + } + } + + diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8131.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8131.asl new file mode 100644 index 0000000000..fbc0b30e42 --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/amd8131.asl @@ -0,0 +1,119 @@ +/* + * Copyright 2005 AMD + */ + + Device (PG0A) + { + /* 8132 pcix bridge*/ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00000000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) } + Else { Return (Package (0x02) { 0x29, 0x01 }) } + } + + Name (APIC, Package (0x14) + { + // Slot 3 - PIRQ BCDA ---- verified + Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 3 + Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, + Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, + Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 }, + + //Slot 4 - PIRQ CDAB ---- verified + Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1A }, //? + Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1B }, + Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x18 }, + Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x19 }, + + //Onboard NIC 1 - PIRQ DABC + Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x1B }, //? + Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x18 }, + Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x19 }, + Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x1A }, + + // NIC 2 - PIRQ ABCD -- verified + Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x18 }, //? + Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x19 }, + Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x1A }, + Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x1B }, + + //SERIAL ATA - PIRQ BCDA + Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x19 }, //? + Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x1A }, + Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x1B }, + Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x18 } + }) + Name (PICM, Package (0x14) + { + Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 3 + Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, + + Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, + + Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, + + Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, + + Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 } + }) + Method (_PRT, 0, NotSerialized) + { + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + } + + Device (PG0B) + { + /* 8132 pcix bridge 2 */ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00010000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x22, 0x03 }) } + Else { Return (Package (0x02) { 0x22, 0x01 }) } + } + + Name (APIC, Package (0x04) + { + // Slot A - PIRQ CDAB -- verfied + Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1E },// Slot 2 + Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1F }, + Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x1C }, + Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x1D } + }) + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 },//Slot 2 + Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 } + }) + Method (_PRT, 0, NotSerialized) + { + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + } diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl new file mode 100644 index 0000000000..163c0f6061 --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl @@ -0,0 +1,114 @@ +/* + * Copyright 2005 AMD + */ + + Device (PG0A) + { + /* 8132 pcix bridge*/ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00000000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) } + Else { Return (Package (0x02) { 0x29, 0x01 }) } + } + + Name (APIC, Package (0x04) + { + // Slot A - PIRQ BCDA + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B }, + + }) + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, + }) + + Name (DNCG, Ones) + + Method (_PRT, 0, NotSerialized) + { + If (LEqual (^DNCG, Ones)) { + Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8 + Store (0x00, Local1) + While (LLess (Local1, 0x04)) + { + // Update the GSI according to HCIN + Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0) + Add(Local2, Local0, Local0) + Store(Local0, Index (DeRefOf (Index (APIC, Local1)), 3)) + Increment (Local1) + } + + Store (0x00, ^DNCG) + + } + + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + } + + Device (PG0B) + { + /* 8132 pcix bridge 2 */ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00010000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x22, 0x03 }) } + Else { Return (Package (0x02) { 0x22, 0x01 }) } + } + + Name (APIC, Package (0x04) + { + // Slot A - PIRQ ABCD + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1 + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 } + }) + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } + }) + + Name (DNCG, Ones) + + Method (_PRT, 0, NotSerialized) + { + If (LEqual (^DNCG, Ones)) { + Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8 + Store (0x00, Local1) + While (LLess (Local1, 0x04)) + { + // Update the GSI according to HCIN + Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0) + Add(Local2, Local0, Local0) + Store(Local0, Index (DeRefOf (Index (APIC, Local1)), 3)) + Increment (Local1) + } + + Store (0x00, ^DNCG) + + } + + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + } diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl new file mode 100644 index 0000000000..75ef72343a --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl @@ -0,0 +1,114 @@ +/* + * Copyright 2005 AMD + */ + + Device (PG0A) + { + /* 8132 pcix bridge*/ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00000000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) } + Else { Return (Package (0x02) { 0x29, 0x01 }) } + } + + Name (APIC, Package (0x04) + { + // Slot A - PIRQ BCDA + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B }, + + }) + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, + }) + + Name (DNCG, Ones) + + Method (_PRT, 0, NotSerialized) + { + If (LEqual (^DNCG, Ones)) { + Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14 + Store (0x00, Local1) + While (LLess (Local1, 0x04)) + { + // Update the GSI according to HCIN + Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0) + Add(Local2, Local0, Local0) + Store(Local0, Index (DeRefOf (Index (APIC, Local1)), 3)) + Increment (Local1) + } + + Store (0x00, ^DNCG) + + } + + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + } + + Device (PG0B) + { + /* 8132 pcix bridge 2 */ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00010000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x22, 0x03 }) } + Else { Return (Package (0x02) { 0x22, 0x01 }) } + } + + Name (APIC, Package (0x04) + { + // Slot A - PIRQ ABCD + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1 + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 } + }) + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } + }) + + Name (DNCG, Ones) + + Method (_PRT, 0, NotSerialized) + { + If (LEqual (^DNCG, Ones)) { + Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14 + Store (0x00, Local1) + While (LLess (Local1, 0x04)) + { + // Update the GSI according to HCIN + Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0) + Add(Local2, Local0, Local0) + Store(Local0, Index (DeRefOf (Index (APIC, Local1)), 3)) + Increment (Local1) + } + + Store (0x00, ^DNCG) + + } + + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + } diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8151.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8151.asl new file mode 100644 index 0000000000..001d45b0fe --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/amd8151.asl @@ -0,0 +1,29 @@ +// AMD8151 + Device (AGPB) + { + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00010000)) + } + + Name (APIC, Package (0x04) + { + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 } + }) + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } + }) + Method (_PRT, 0, NotSerialized) + { + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + } + diff --git a/src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl b/src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl new file mode 100644 index 0000000000..95a4860c63 --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl @@ -0,0 +1,20 @@ +/* + * Copyright 2006 AMD + */ + + Device (HTXA) + { + /* HTX */ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00000000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) } + Else { Return (Package (0x02) { 0x29, 0x01 }) } + } + + } + diff --git a/src/mainboard/iwill/dk8_htx/acpi/pci0_hc.asl b/src/mainboard/iwill/dk8_htx/acpi/pci0_hc.asl new file mode 100644 index 0000000000..2fd3b09de4 --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/pci0_hc.asl @@ -0,0 +1,2 @@ + #include "amd8111.asl" //real SB at first + #include "amd8131.asl" diff --git a/src/mainboard/iwill/dk8_htx/acpi/pci2_hc.asl b/src/mainboard/iwill/dk8_htx/acpi/pci2_hc.asl new file mode 100644 index 0000000000..fd3ad2c3e3 --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/pci2_hc.asl @@ -0,0 +1 @@ + #include "amd8132_2.asl" diff --git a/src/mainboard/iwill/dk8_htx/acpi/pci3_hc.asl b/src/mainboard/iwill/dk8_htx/acpi/pci3_hc.asl new file mode 100644 index 0000000000..070ebe5286 --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/pci3_hc.asl @@ -0,0 +1 @@ + #include "amd8151.asl" diff --git a/src/mainboard/iwill/dk8_htx/acpi/pci4_hc.asl b/src/mainboard/iwill/dk8_htx/acpi/pci4_hc.asl new file mode 100644 index 0000000000..bd3f70ea0f --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/pci4_hc.asl @@ -0,0 +1 @@ + #include "amd8131_2.asl" diff --git a/src/mainboard/iwill/dk8_htx/acpi/pci5_hc.asl b/src/mainboard/iwill/dk8_htx/acpi/pci5_hc.asl new file mode 100644 index 0000000000..f7f0a7dbad --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/pci5_hc.asl @@ -0,0 +1 @@ + #include "htx_no_ioapic.asl" diff --git a/src/mainboard/iwill/dk8_htx/acpi/superio.asl b/src/mainboard/iwill/dk8_htx/acpi/superio.asl new file mode 100644 index 0000000000..83ee58253d --- /dev/null +++ b/src/mainboard/iwill/dk8_htx/acpi/superio.asl @@ -0,0 +1 @@ +// #include "w83627hf.asl" |