aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/iwave/iWRainbowG6/dsdt.asl
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/iwave/iWRainbowG6/dsdt.asl')
-rw-r--r--src/mainboard/iwave/iWRainbowG6/dsdt.asl9
1 files changed, 4 insertions, 5 deletions
diff --git a/src/mainboard/iwave/iWRainbowG6/dsdt.asl b/src/mainboard/iwave/iWRainbowG6/dsdt.asl
index a33744577a..0dc46f2caa 100644
--- a/src/mainboard/iwave/iWRainbowG6/dsdt.asl
+++ b/src/mainboard/iwave/iWRainbowG6/dsdt.asl
@@ -17,7 +17,7 @@ DefinitionBlock(
"dsdt.aml",
"DSDT",
0x02, // DSDT revision: ACPI v2.0
- "COREv2", // OEM id
+ "COREv4", // OEM id
"COREBOOT", // OEM table id
0x20090419 // OEM revision
)
@@ -26,7 +26,7 @@ DefinitionBlock(
#include "acpi/platform.asl"
// global NVS and variables
- #include <southbridge/intel/sch/acpi/globalnvs.asl>
+ #include <soc/intel/sch/acpi/globalnvs.asl>
// General Purpose Events
//#include "acpi/gpe.asl"
@@ -36,11 +36,10 @@ DefinitionBlock(
Scope (\_SB) {
Device (PCI0)
{
- #include <northbridge/intel/sch/acpi/sch.asl>
- #include <southbridge/intel/sch/acpi/sch.asl>
+ #include <soc/intel/sch/acpi/sch.asl>
}
}
/* Chipset specific sleep states */
- #include <southbridge/intel/sch/acpi/sleepstates.asl>
+ #include <soc/intel/sch/acpi/sleepstates.asl>
}