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-rw-r--r--src/mainboard/intel/emeraldlake2/Makefile.inc1
-rw-r--r--src/mainboard/intel/emeraldlake2/gpio.c (renamed from src/mainboard/intel/emeraldlake2/gpio.h)0
-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c2
3 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/emeraldlake2/Makefile.inc b/src/mainboard/intel/emeraldlake2/Makefile.inc
index c29b100197..b3bf53f028 100644
--- a/src/mainboard/intel/emeraldlake2/Makefile.inc
+++ b/src/mainboard/intel/emeraldlake2/Makefile.inc
@@ -15,3 +15,4 @@
romstage-y += chromeos.c
ramstage-y += chromeos.c
+romstage-y += gpio.c
diff --git a/src/mainboard/intel/emeraldlake2/gpio.h b/src/mainboard/intel/emeraldlake2/gpio.c
index 37b2430aea..37b2430aea 100644
--- a/src/mainboard/intel/emeraldlake2/gpio.h
+++ b/src/mainboard/intel/emeraldlake2/gpio.c
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index 145526a060..8528bffc03 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -30,12 +30,10 @@
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit.h>
#include <southbridge/intel/bd82x6x/pch.h>
-#include <southbridge/intel/bd82x6x/gpio.h>
#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <halt.h>
#include <tpm.h>
-#include "gpio.h"
#define SIO_PORT 0x164e