diff options
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb | 5 | ||||
-rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb | 4 | ||||
-rw-r--r-- | src/mainboard/intel/saddlebrook/devicetree.cb | 5 |
3 files changed, 8 insertions, 6 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index 49edccb6e1..8a3161a41f 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -4,8 +4,6 @@ chip soc/intel/skylake register "DspEnable" = "0" register "ScsEmmcHs400Enabled" = "0" - register "serirq_mode" = "SERIRQ_CONTINUOUS" - # Enable PCIE slot register "PcieRpEnable[5]" = "1" register "PcieRpClkReqSupport[5]" = "1" @@ -119,5 +117,8 @@ chip soc/intel/skylake device ref sdxc off end device ref hda on end device ref gbe on end + device ref lpc_espi on + register "serirq_mode" = "SERIRQ_CONTINUOUS" + end end end diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb index 5516fee9b8..010312c4d4 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb @@ -7,8 +7,6 @@ chip soc/intel/skylake # FSP Configuration register "ScsEmmcHs400Enabled" = "0" - register "serirq_mode" = "SERIRQ_CONTINUOUS" - # VR Settings Configuration for 5 Domains #+----------------+-------+-------+-------------+-------------+-------+ #| Domain/Setting | SA | IA | Ring Sliced | GT Unsliced | GT | @@ -173,6 +171,8 @@ chip soc/intel/skylake device ref emmc off end device ref sdxc off end device ref lpc_espi on + register "serirq_mode" = "SERIRQ_CONTINUOUS" + #chip drivers/pc80/tpm # device pnp 0c31.0 on end #end diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index 73df651458..2f5058d796 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -32,8 +32,6 @@ chip soc/intel/skylake # SLP_A Minimum Assertion Width. Values 0: 0ms, 1: 4s, 2: 98ms, 3: 2s register "PmConfigSlpAMinAssert" = "0x03" - register "serirq_mode" = "SERIRQ_CONTINUOUS" - # VR Settings Configuration for 4 Domains #+----------------+-----------+-----------+-------------+----------+ #| Domain/Setting | SA | IA | GT Unsliced | GT | @@ -217,6 +215,9 @@ chip soc/intel/skylake device ref gspi1 on end device ref hda on end device ref smbus on end + device ref lpc_espi on + register "serirq_mode" = "SERIRQ_CONTINUOUS" + end device ref fast_spi on end device ref gbe on end end |