diff options
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r-- | src/mainboard/intel/baskingridge/chromeos.c | 5 | ||||
-rw-r--r-- | src/mainboard/intel/cannonlake_rvp/chromeos.c | 5 | ||||
-rw-r--r-- | src/mainboard/intel/coffeelake_rvp/chromeos.c | 5 | ||||
-rw-r--r-- | src/mainboard/intel/emeraldlake2/chromeos.c | 5 | ||||
-rw-r--r-- | src/mainboard/intel/icelake_rvp/chromeos.c | 5 | ||||
-rw-r--r-- | src/mainboard/intel/kblrvp/chromeos.c | 5 | ||||
-rw-r--r-- | src/mainboard/intel/kunimitsu/chromeos.c | 6 | ||||
-rw-r--r-- | src/mainboard/intel/strago/chromeos.c | 5 |
8 files changed, 8 insertions, 33 deletions
diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c index 6561927d3b..6048620659 100644 --- a/src/mainboard/intel/baskingridge/chromeos.c +++ b/src/mainboard/intel/baskingridge/chromeos.c @@ -15,6 +15,7 @@ #include <string.h> #include <bootmode.h> +#include <boot/coreboot_tables.h> #include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> @@ -22,9 +23,6 @@ #include <southbridge/intel/common/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -#if ENV_RAMSTAGE -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -45,7 +43,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif int get_recovery_mode_switch(void) { diff --git a/src/mainboard/intel/cannonlake_rvp/chromeos.c b/src/mainboard/intel/cannonlake_rvp/chromeos.c index 44254bcbcb..0440994f5a 100644 --- a/src/mainboard/intel/cannonlake_rvp/chromeos.c +++ b/src/mainboard/intel/cannonlake_rvp/chromeos.c @@ -15,14 +15,12 @@ #include <arch/acpi.h> #include <baseboard/variants.h> +#include <boot/coreboot_tables.h> #include <gpio.h> #include <soc/gpio.h> #include <variant/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -#if ENV_RAMSTAGE -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -33,7 +31,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif /* ENV_RAMSTAGE */ int get_lid_switch(void) { diff --git a/src/mainboard/intel/coffeelake_rvp/chromeos.c b/src/mainboard/intel/coffeelake_rvp/chromeos.c index a581217e17..e7094d71e9 100644 --- a/src/mainboard/intel/coffeelake_rvp/chromeos.c +++ b/src/mainboard/intel/coffeelake_rvp/chromeos.c @@ -15,13 +15,11 @@ #include <arch/acpi.h> #include <baseboard/variants.h> +#include <boot/coreboot_tables.h> #include <gpio.h> #include <soc/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -#if ENV_RAMSTAGE -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -32,7 +30,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif /* ENV_RAMSTAGE */ int get_lid_switch(void) { diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c index 699141fc0f..74fe20f548 100644 --- a/src/mainboard/intel/emeraldlake2/chromeos.c +++ b/src/mainboard/intel/emeraldlake2/chromeos.c @@ -15,6 +15,7 @@ #include <string.h> #include <bootmode.h> +#include <boot/coreboot_tables.h> #include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> @@ -22,9 +23,6 @@ #include <southbridge/intel/common/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -#if ENV_RAMSTAGE -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -45,7 +43,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif int get_recovery_mode_switch(void) { diff --git a/src/mainboard/intel/icelake_rvp/chromeos.c b/src/mainboard/intel/icelake_rvp/chromeos.c index ce8e5486d8..785fe4a862 100644 --- a/src/mainboard/intel/icelake_rvp/chromeos.c +++ b/src/mainboard/intel/icelake_rvp/chromeos.c @@ -15,14 +15,12 @@ #include <arch/acpi.h> #include <baseboard/variants.h> +#include <boot/coreboot_tables.h> #include <gpio.h> #include <soc/gpio.h> #include <variant/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -#if ENV_RAMSTAGE -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -33,7 +31,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif /* ENV_RAMSTAGE */ int get_lid_switch(void) { diff --git a/src/mainboard/intel/kblrvp/chromeos.c b/src/mainboard/intel/kblrvp/chromeos.c index ff93d27f22..29f05c9ec3 100644 --- a/src/mainboard/intel/kblrvp/chromeos.c +++ b/src/mainboard/intel/kblrvp/chromeos.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <boot/coreboot_tables.h> #include <device/device.h> #include <device/pci.h> #include <gpio.h> @@ -24,9 +25,6 @@ #include "gpio.h" #include "ec.h" -#if ENV_RAMSTAGE -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -37,7 +35,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif /* ENV_RAMSTAGE */ int get_lid_switch(void) { diff --git a/src/mainboard/intel/kunimitsu/chromeos.c b/src/mainboard/intel/kunimitsu/chromeos.c index 64224889a5..3f3dd409c3 100644 --- a/src/mainboard/intel/kunimitsu/chromeos.c +++ b/src/mainboard/intel/kunimitsu/chromeos.c @@ -14,15 +14,12 @@ * GNU General Public License for more details. */ +#include <boot/coreboot_tables.h> #include <gpio.h> #include <soc/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> - #include "gpio.h" -#if ENV_RAMSTAGE -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -35,7 +32,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif /* ENV_RAMSTAGE */ int get_write_protect_state(void) { diff --git a/src/mainboard/intel/strago/chromeos.c b/src/mainboard/intel/strago/chromeos.c index df36b38a31..540ba6a349 100644 --- a/src/mainboard/intel/strago/chromeos.c +++ b/src/mainboard/intel/strago/chromeos.c @@ -14,14 +14,12 @@ * GNU General Public License for more details. */ +#include <boot/coreboot_tables.h> #include <gpio.h> #include <vendorcode/google/chromeos/chromeos.h> #define WP_GPIO GP_E_22 -#if ENV_RAMSTAGE -#include <boot/coreboot_tables.h> - #define ACTIVE_LOW 0 #define ACTIVE_HIGH 1 @@ -35,7 +33,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif /* ENV_RAMSTAGE */ int get_write_protect_state(void) { |