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-rw-r--r--src/mainboard/intel/d945gclf/Config.lb2
-rw-r--r--src/mainboard/intel/d945gclf/Makefile.inc1
-rw-r--r--src/mainboard/intel/d945gclf/auto.c8
-rw-r--r--src/mainboard/intel/d945gclf/debug.c126
-rw-r--r--src/mainboard/intel/d945gclf/power_reset_check.c28
-rw-r--r--src/mainboard/intel/d945gclf/reset.c31
-rw-r--r--src/mainboard/intel/eagleheights/power_reset_check.c31
7 files changed, 5 insertions, 222 deletions
diff --git a/src/mainboard/intel/d945gclf/Config.lb b/src/mainboard/intel/d945gclf/Config.lb
index 1801753503..6671471132 100644
--- a/src/mainboard/intel/d945gclf/Config.lb
+++ b/src/mainboard/intel/d945gclf/Config.lb
@@ -60,8 +60,6 @@ if CONFIG_GENERATE_ACPI_TABLES
object ./dsdt.o
end
-object reset.o
-
if CONFIG_USE_INIT
makerule ./auto.o
diff --git a/src/mainboard/intel/d945gclf/Makefile.inc b/src/mainboard/intel/d945gclf/Makefile.inc
index 47ab895f90..b58ba35967 100644
--- a/src/mainboard/intel/d945gclf/Makefile.inc
+++ b/src/mainboard/intel/d945gclf/Makefile.inc
@@ -24,7 +24,6 @@
driver-y += mainboard.o
driver-y += rtl8168.o
-#obj-y += ../../../southbridge/intel/i82801gx/i82801gx_reset.c
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += dsdt.o
diff --git a/src/mainboard/intel/d945gclf/auto.c b/src/mainboard/intel/d945gclf/auto.c
index e0c4c52348..8d1dc16815 100644
--- a/src/mainboard/intel/d945gclf/auto.c
+++ b/src/mainboard/intel/d945gclf/auto.c
@@ -20,6 +20,10 @@
// __PRE_RAM__ means: use "unsigned" for device, not a struct.
#define __PRE_RAM__
+/* Configuration of the i945 driver */
+#define CHIPSET_I945GC 1
+#define CHANNEL_XOR_RANDOMIZATION 1
+
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
@@ -45,7 +49,6 @@
#include "lib/ramtest.c"
#include "southbridge/intel/i82801gx/i82801gx_early_smbus.c"
-#include "reset.c"
#include "superio/smsc/lpc47m15x/lpc47m15x_early_serial.c"
#include "northbridge/intel/i945/udelay.c"
@@ -77,12 +80,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address);
}
-#define CHANNEL_XOR_RANDOMIZATION 1
#include "northbridge/intel/i945/raminit.h"
#include "northbridge/intel/i945/raminit.c"
#include "northbridge/intel/i945/reset_test.c"
#include "northbridge/intel/i945/errata.c"
-#include "debug.c"
+#include "northbridge/intel/i945/debug.c"
static void ich7_enable_lpc(void)
{
diff --git a/src/mainboard/intel/d945gclf/debug.c b/src/mainboard/intel/d945gclf/debug.c
deleted file mode 100644
index 3e4b13d1ce..0000000000
--- a/src/mainboard/intel/d945gclf/debug.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2008 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define SMBUS_MEM_DEVICE_START 0x50
-#define SMBUS_MEM_DEVICE_END 0x53
-#define SMBUS_MEM_DEVICE_INC 1
-
-static void print_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- printk_debug("PCI: %02x:%02x.%02x", (dev >> 20) & 0xff,
- (dev >> 15) & 0x1f, (dev >> 12) & 7);
- printk_debug(" [%04x:%04x]\r\n", id &0xffff, id >> 16);
- }
-}
-
-static void dump_pci_device(unsigned dev)
-{
- int i;
-
- printk_debug("PCI: %02x:%02x.%02x\r\n", (dev >> 20) & 0xff, (dev >> 15) & 0x1f, (dev >> 12) & 7);
-
- for(i = 0; i <= 255; i++) {
- unsigned char val;
- if ((i & 0x0f) == 0) {
- printk_debug("%02x:", i);
- }
- val = pci_read_config8(dev, i);
- printk_debug(" %02x", val);
- if ((i & 0x0f) == 0x0f) {
- printk_debug("\r\n");
- }
- }
-}
-
-static void dump_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- dump_pci_device(dev);
- }
-}
-
-void dump_spd_registers(void)
-{
- unsigned device;
- device = SMBUS_MEM_DEVICE_START;
- while(device <= SMBUS_MEM_DEVICE_END) {
- int status = 0;
- int i;
- printk_debug("\r\ndimm %02x", device);
-
- for(i = 0; (i < 256) ; i++) {
- if ((i % 16) == 0) {
- printk_debug("\r\n%02x: ", i);
- }
- status = smbus_read_byte(device, i);
- if (status < 0) {
- printk_debug("bad device: %02x\r\n", -status);
- break;
- }
- printk_debug("%02x ", status);
- }
- device += SMBUS_MEM_DEVICE_INC;
- printk_debug("\r\n");
- }
-}
-
-static void dump_mem(unsigned start, unsigned end)
-{
- unsigned i;
- print_debug("dump_mem:");
- for(i=start;i<end;i++) {
- if((i & 0xf)==0) {
-#if CONFIG_USE_INIT
- printk_debug("\r\n%08x:", i);
-#else
- print_debug("\r\n");
- print_debug_hex32(i);
- print_debug(":");
-#endif
- }
-#if CONFIG_USE_INIT
- printk_debug(" %02x", (unsigned char)*((unsigned char *)i));
-#else
- print_debug(" ");
- print_debug_hex8((unsigned char)*((unsigned char *)i));
-#endif
- }
- print_debug("\r\n");
- }
diff --git a/src/mainboard/intel/d945gclf/power_reset_check.c b/src/mainboard/intel/d945gclf/power_reset_check.c
deleted file mode 100644
index f0bf646d92..0000000000
--- a/src/mainboard/intel/d945gclf/power_reset_check.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2008 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-static void power_down_reset_check(void)
-{
- uint8_t cmos;
-
- cmos=cmos_read(RTC_BOOT_BYTE)>>4 ;
- printk_debug("Boot byte = %x\r\n", cmos);
-
- if((cmos>2)&&(cmos&1)) full_reset();
-}
diff --git a/src/mainboard/intel/d945gclf/reset.c b/src/mainboard/intel/d945gclf/reset.c
deleted file mode 100644
index 9c790179ab..0000000000
--- a/src/mainboard/intel/d945gclf/reset.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2008 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/io.h>
-
-void soft_reset(void)
-{
- outb(0x04, 0xcf9);
-}
-
-void hard_reset(void)
-{
- outb(0x02, 0xcf9);
- outb(0x06, 0xcf9);
-}
diff --git a/src/mainboard/intel/eagleheights/power_reset_check.c b/src/mainboard/intel/eagleheights/power_reset_check.c
deleted file mode 100644
index 53ec28f4bb..0000000000
--- a/src/mainboard/intel/eagleheights/power_reset_check.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2008 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-
-static void power_down_reset_check(void)
-{
- uint8_t cmos;
-
- cmos=cmos_read(RTC_BOOT_BYTE)>>4 ;
- printk_debug("Boot byte = %x\r\n", cmos);
-
- if((cmos>2)&&(cmos&1)) full_reset();
-}
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