3 files changed, 2 insertions, 10 deletions
diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c
index 459fb196d8..8d5224e19f 100644
--- a/src/mainboard/intel/d510mo/romstage.c
+++ b/src/mainboard/intel/d510mo/romstage.c
@@ -83,9 +83,7 @@ static void rcba_config(void)
 	/* Enable IOAPIC */
 	RCBA8(OIC) = 0x03;
 
-	RCBA32(FD) = FD_PCIE6 | FD_PCIE5 | FD_INTLAN | FD_ACMOD | FD_ACAUD
-		| FD_PATA;
-	RCBA32(FD) |= 1;
+	RCBA32(FD) |= FD_INTLAN;
 }
 
 void mainboard_romstage_entry(unsigned long bist)
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 6f0e419b76..9a4e0675b6 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -62,10 +62,7 @@ static void rcba_config(void)
 	RCBA8(OIC) = 0x03;
 
 	/* Disable unused devices */
-	// FIXME devicetree disables pcie3 not 2.
-	RCBA32(FD) = FD_PCIE6 | FD_PCIE5 | FD_PCIE2 | (1 << 10) | FD_INTLAN
-		| FD_ACMOD | FD_ACAUD;
-	RCBA32(FD) |= 1;
+	RCBA32(FD) |= FD_INTLAN;
 
 	/* Enable PCIe Root Port Clock Gate */
 	// RCBA32(0x341c) = 0x00000001;
@@ -110,7 +107,6 @@ static void early_ich7_init(void)
 	reg32 &= ~(3 << 0);
 	reg32 |= (1 << 0);
 	RCBA32(0x3430) = reg32;
-	RCBA32(FD) |= (1 << 0);
 	RCBA16(0x0200) = 0x2008;
 	RCBA8(0x2027) = 0x0d;
 	RCBA16(0x3e08) |= (1 << 7);
diff --git a/src/mainboard/intel/dg41wv/romstage.c b/src/mainboard/intel/dg41wv/romstage.c
index 6e9d034b88..830bc73d75 100644
--- a/src/mainboard/intel/dg41wv/romstage.c
+++ b/src/mainboard/intel/dg41wv/romstage.c
@@ -59,8 +59,6 @@ static void mb_lpc_setup(void)
 	reg32 = RCBA32(GCS);
 	reg32 |= (1 << 5);
 	RCBA32(GCS) = reg32;
-	RCBA32(FD) = FD_PCIE6 | FD_PCIE5 | FD_PCIE4 | FD_PCIE3 | FD_ACMOD
-		| FD_ACAUD | FD_PATA |1;
 	RCBA32(CG) = 0x00000001;
 }