diff options
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r-- | src/mainboard/intel/d810e2cb/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/intel/d945gclf/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/intel/eagleheights/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/intel/emeraldlake2/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/intel/jarrell/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/intel/mtarvon/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/intel/truxton/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/intel/xe7501devkit/romstage.c | 1 |
8 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/intel/d810e2cb/romstage.c b/src/mainboard/intel/d810e2cb/romstage.c index 6c277d5cfe..982060c3b3 100644 --- a/src/mainboard/intel/d810e2cb/romstage.c +++ b/src/mainboard/intel/d810e2cb/romstage.c @@ -35,6 +35,7 @@ #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) +#include <cpu/intel/car.h> void main(unsigned long bist) { /* Set southbridge and Super I/O GPIOs. */ diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index fbec052fba..94b66104ab 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -156,6 +156,7 @@ static void early_ich7_init(void) RCBA32(0x2034) = reg32; } +#include <cpu/intel/car.h> void main(unsigned long bist) { u32 reg32; diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index 249fda44d5..99445b88e5 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -120,6 +120,7 @@ static void early_config(void) pci_write_config8(PCI_DEV(0, 0x1F, 2), SATA_MAP, (SATA_MODE_AHCI << 6) | (0 << 0)); } +#include <cpu/intel/car.h> void main(unsigned long bist) { /* int boot_mode = 0; */ diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 5597a2d496..12abb548b5 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -162,6 +162,7 @@ static void setup_sio_gpios(void) outb(0xaa, port); } +#include <cpu/intel/car.h> void main(unsigned long bist) { int boot_mode = 0; diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c index bddb34afe6..a672afa5b1 100644 --- a/src/mainboard/intel/jarrell/romstage.c +++ b/src/mainboard/intel/jarrell/romstage.c @@ -38,6 +38,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "debug.c" #include "arch/x86/lib/stages.c" +#include <cpu/intel/car.h> static void main(unsigned long bist) { static const struct mem_controller mch[] = { diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c index 0cab9bdeed..2e99be558b 100644 --- a/src/mainboard/intel/mtarvon/romstage.c +++ b/src/mainboard/intel/mtarvon/romstage.c @@ -51,6 +51,7 @@ static inline int spd_read_byte(u16 device, u8 address) #include "arch/x86/lib/stages.c" #endif +#include <cpu/intel/car.h> void main(unsigned long bist) { msr_t msr; diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c index 71c5f38d8f..c56b1dfe31 100644 --- a/src/mainboard/intel/truxton/romstage.c +++ b/src/mainboard/intel/truxton/romstage.c @@ -51,6 +51,7 @@ static inline int spd_read_byte(u16 device, u8 address) #define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1) +#include <cpu/intel/car.h> static void main(unsigned long bist) { msr_t msr; diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c index 342e6f14cb..f35f93ba20 100644 --- a/src/mainboard/intel/xe7501devkit/romstage.c +++ b/src/mainboard/intel/xe7501devkit/romstage.c @@ -33,6 +33,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" // This function MUST appear last (ROMCC limitation) +#include <cpu/intel/car.h> static void main(unsigned long bist) { static const struct mem_controller memctrl[] = { |