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-rw-r--r--src/mainboard/intel/eagleheights/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 47675a5317..c254f17b7e 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -26,6 +26,7 @@
#include <console/console.h>
#include <delay.h>
#include <cpu/x86/bist.h>
+#include <cpu/intel/romstage.h>
#include <cpu/intel/speedstep.h>
#include "southbridge/intel/i3100/early_smbus.c"
#include "southbridge/intel/i3100/early_lpc.c"
@@ -117,8 +118,7 @@ static void early_config(void)
pci_write_config8(PCI_DEV(0, 0x1F, 2), SATA_MAP, (SATA_MODE_AHCI << 6) | (0 << 0));
}
-#include <cpu/intel/romstage.h>
-void main(unsigned long bist)
+void mainboard_romstage_entry(unsigned long bist)
{
/* int boot_mode = 0; */