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-rw-r--r--src/mainboard/intel/baskingridge/Kconfig1
-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c10
-rw-r--r--src/mainboard/intel/wtm2/Kconfig1
3 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/intel/baskingridge/Kconfig b/src/mainboard/intel/baskingridge/Kconfig
index c3e336115e..f9161388dc 100644
--- a/src/mainboard/intel/baskingridge/Kconfig
+++ b/src/mainboard/intel/baskingridge/Kconfig
@@ -11,6 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_RESUME
select HAVE_SMI_HANDLER
select MAINBOARD_HAS_CHROMEOS
+ select MAINBOARD_HAS_LPC_TPM
select INTEL_INT15
select CHROMEOS_VBNV_CMOS
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index c9d5cf1f78..bcf498b7a4 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -39,10 +39,8 @@
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
#include <halt.h>
+#include <tpm.h>
#include "gpio.h"
-#if CONFIG_CHROMEOS
-#include <vendorcode/google/chromeos/chromeos.h>
-#endif
#define SIO_PORT 0x164e
@@ -255,8 +253,8 @@ void main(unsigned long bist)
northbridge_romstage_finalize(boot_mode==2);
post_code(0x3f);
-#if CONFIG_CHROMEOS
- init_chromeos(boot_mode);
-#endif
+ if (CONFIG_LPC_TPM) {
+ init_tpm(boot_mode == 2);
+ }
timestamp_add_now(TS_END_ROMSTAGE);
}
diff --git a/src/mainboard/intel/wtm2/Kconfig b/src/mainboard/intel/wtm2/Kconfig
index 5a064d1237..b8f616a1e8 100644
--- a/src/mainboard/intel/wtm2/Kconfig
+++ b/src/mainboard/intel/wtm2/Kconfig
@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_RESUME
select HAVE_SMI_HANDLER
select MAINBOARD_HAS_CHROMEOS
+ select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_HAS_NATIVE_VGA_INIT
select INTEL_INT15