diff options
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/truxton/Config.lb | 13 | ||||
| -rw-r--r-- | src/mainboard/intel/truxton/Options.lb | 12 | ||||
| -rw-r--r-- | src/mainboard/intel/truxton/devicetree.cb | 13 |
3 files changed, 37 insertions, 1 deletions
diff --git a/src/mainboard/intel/truxton/Config.lb b/src/mainboard/intel/truxton/Config.lb index 7ec2da81b6..a297da1133 100644 --- a/src/mainboard/intel/truxton/Config.lb +++ b/src/mainboard/intel/truxton/Config.lb @@ -143,6 +143,19 @@ chip northbridge/intel/i3100 io 0x60 = 0x2f8 irq 0x70 = 3 end + end + chip superio/smsc/smscsuperio + device pnp 2e.0 off end + device pnp 2e.3 off end + device pnp 2e.4 off end + device pnp 2e.5 off end + device pnp 2e.7 on # PS/2 keyboard / mouse + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 # PS/2 keyboard interrupt + irq 0x72 = 12 # PS/2 mouse interrupt + end + device pnp 2e.a off end end end device pci 1f.2 on end # SATA diff --git a/src/mainboard/intel/truxton/Options.lb b/src/mainboard/intel/truxton/Options.lb index 2f98066cd3..2dd7db55fa 100644 --- a/src/mainboard/intel/truxton/Options.lb +++ b/src/mainboard/intel/truxton/Options.lb @@ -37,6 +37,7 @@ uses CONFIG_ROM_SECTION_OFFSET uses CONFIG_ROM_PAYLOAD uses CONFIG_ROM_PAYLOAD_START uses CONFIG_COMPRESSED_PAYLOAD_LZMA +uses CONFIG_LB_MEM_TOPK uses CONFIG_PAYLOAD_SIZE uses CONFIG_ROMBASE uses CONFIG_XIP_ROM_SIZE @@ -67,6 +68,7 @@ uses CC uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY +uses CONFIG_CONSOLE_VGA ### @@ -155,7 +157,12 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## coreboot C code runs at this location in RAM ## -default CONFIG_RAMBASE=0x00004000 +default CONFIG_RAMBASE=0x00100000 + +## +## in order to have coreboot running at 0x100000, TOPK has to be set +## +default CONFIG_LB_MEM_TOPK = 2*1024*1024 ## ## Load the payload from the ROM @@ -202,6 +209,9 @@ default CONFIG_TTYS0_BASE=0x3f8 # This defaults to 8 data bits, 1 stop bit, and no parity default CONFIG_TTYS0_LCS=0x3 +# Enable the VGA console. +default CONFIG_CONSOLE_VGA=1 + ## ### Select the coreboot loglevel ## diff --git a/src/mainboard/intel/truxton/devicetree.cb b/src/mainboard/intel/truxton/devicetree.cb index 7604beafe5..a21c2f4eae 100644 --- a/src/mainboard/intel/truxton/devicetree.cb +++ b/src/mainboard/intel/truxton/devicetree.cb @@ -26,6 +26,19 @@ chip northbridge/intel/i3100 io 0x60 = 0x2f8 irq 0x70 = 3 end + end + chip superio/smsc/smscsuperio + device pnp 2e.0 off end + device pnp 2e.3 off end + device pnp 2e.4 off end + device pnp 2e.5 off end + device pnp 2e.7 on # PS/2 keyboard / mouse + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 # PS/2 keyboard interrupt + irq 0x72 = 12 # PS/2 mouse interrupt + end + device pnp 2e.a off end end end device pci 1f.2 on end # SATA |