diff options
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/adlrvp/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/adlrvp/devicetree_m.cb | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb index 57d78de9ce..5ca8468118 100644 --- a/src/mainboard/intel/adlrvp/devicetree.cb +++ b/src/mainboard/intel/adlrvp/devicetree.cb @@ -41,7 +41,6 @@ chip soc/intel/alderlake register "gen2_dec" = "0x000c0201" # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" - register "gen4_dec" = "0x000c0081" # This disabled autonomous GPIO power management, otherwise # old cr50 FW only supports short pulses; need to clarify diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index 7c691638c7..c6c2537978 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -34,7 +34,6 @@ chip soc/intel/alderlake register "gen2_dec" = "0x000c0201" # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" - register "gen4_dec" = "0x000c0081" register "PrmrrSize" = "0" |