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-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index 23d20b0610..7a3124269d 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -309,11 +309,8 @@ void main(unsigned long bist)
rcba_config();
post_code(0x3d);
- /* Initialize the internal PCIe links before we go into stage2 */
- sandybridge_late_initialization();
-
- post_code(0x3e);
quick_ram_check();
+ post_code(0x3e);
MCHBAR16(SSKPD) = 0xCAFE;
#if CONFIG_EARLY_CBMEM_INIT