2 files changed, 1 insertions, 6 deletions
diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c
index 7f3a58d0f2..1cd58b0ba5 100644
--- a/src/mainboard/intel/dcp847ske/early_southbridge.c
+++ b/src/mainboard/intel/dcp847ske/early_southbridge.c
@@ -31,7 +31,7 @@ void pch_enable_lpc(void)
 {
 }
 
-void mainboard_rcba_config(void)
+void mainboard_late_rcba_config(void)
 {
 	/* Disable devices */
 	RCBA32(FD) |= PCH_DISABLE_P2P | PCH_DISABLE_XHCI;
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index e7959ef32f..16a16de33f 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -43,11 +43,6 @@ void pch_enable_lpc(void)
 	}
 }
 
-void mainboard_rcba_config(void)
-{
-	southbridge_configure_default_intmap();
-}
-
 void mainboard_config_superio(void)
 {
 	const u16 port = SIO_PORT;