12 files changed, 358 insertions, 1 deletions
diff --git a/src/mainboard/intel/Kconfig b/src/mainboard/intel/Kconfig
index 792d600548..c14e88c8ad 100644
--- a/src/mainboard/intel/Kconfig
+++ b/src/mainboard/intel/Kconfig
@@ -1 +1,12 @@
-#
+choice
+        prompt "Mainboard model"
+        depends on VENDOR_INTEL
+
+source "src/mainboard/intel/eagleheights/Kconfig"
+source "src/mainboard/intel/jarrell/Kconfig"
+source "src/mainboard/intel/mtarvon/Kconfig"
+source "src/mainboard/intel/truxton/Kconfig"
+source "src/mainboard/intel/xe7501devkit/Kconfig"
+
+endchoice
+
diff --git a/src/mainboard/intel/eagleheights/Kconfig b/src/mainboard/intel/eagleheights/Kconfig
new file mode 100644
index 0000000000..92e9a382b6
--- /dev/null
+++ b/src/mainboard/intel/eagleheights/Kconfig
@@ -0,0 +1,48 @@
+config BOARD_INTEL_EAGLEHEIGHTS
+	bool "EagleHeights"
+	select ARCH_X86
+	select CPU_INTEL_SOCKET_BGA956
+	select NORTHBRIDGE_INTEL_I3100
+	select SOUTHBRIDGE_INTEL_I3100
+	select SUPERIO_INTEL_I3100
+	select SUPERIO_SMSC_SMSCSUPERIO
+	select HAVE_PIRQ_TABLE
+	select HAVE_HIGH_TABLES
+	select MMCONF_SUPPORT
+	select USE_PRINTK_IN_CAR
+	select UDELAY_TSC
+	select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+	select AP_IN_SIPI_WAIT
+	help
+          Intel EagleHeights mainboard.
+
+config MAINBOARD_DIR
+	string
+	default intel/eagleheights
+	depends on BOARD_INTEL_EAGLEHEIGHTS
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xffdf8000
+	depends on BOARD_INTEL_EAGLEHEIGHTS
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x8000
+	depends on BOARD_INTEL_EAGLEHEIGHTS
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_INTEL_EAGLEHEIGHTS
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_INTEL_EAGLEHEIGHTS
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "EagleHeights"
+	depends on BOARD_INTEL_EAGLEHEIGHTS
+
diff --git a/src/mainboard/intel/eagleheights/Makefile.inc b/src/mainboard/intel/eagleheights/Makefile.inc
new file mode 100644
index 0000000000..1f9c31f5eb
--- /dev/null
+++ b/src/mainboard/intel/eagleheights/Makefile.inc
@@ -0,0 +1,38 @@
+driver-y += mainboard.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-y += reset.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/intel/model_6ex/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+MAINBOARD_OPTIONS=\
+	-DCONFIG_MMCONF_SUPPORT=1 \
+	-DCONFIG_MMCONF_BASE_ADDRESS=0xe0000000
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+	perl -e 's/\.rodata/.rom.data/g' -pi $@
+	perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/intel/eagleheights/devicetree.cb b/src/mainboard/intel/eagleheights/devicetree.cb
new file mode 100644
index 0000000000..e5bbf20297
--- /dev/null
+++ b/src/mainboard/intel/eagleheights/devicetree.cb
@@ -0,0 +1,73 @@
+chip northbridge/intel/i3100
+        device pci_domain 0 on
+                device pci 00.0 on end # IMCH
+                device pci 00.1 on end # IMCH error status
+                device pci 01.0 on end # IMCH EDMA engine
+                device pci 02.0 on end # PCIe port A/A0
+                device pci 03.0 on end # PCIe port A1
+                chip southbridge/intel/i3100
+                        # PIRQ line -> legacy IRQ mappings
+			register "pirq_a_d" = "0x8b808a8a"
+                        register "pirq_e_h" = "0x85808080"
+
+                        device pci 1c.0 on end # PCIe port B0
+                        device pci 1c.1 off end # PCIe port B1
+                        device pci 1c.2 off end # PCIe port B2
+                        device pci 1c.3 off end # PCIe port B3
+                        device pci 1d.0 on end # USB (UHCI) 1
+                        device pci 1d.1 on end # USB (UHCI) 2
+                        device pci 1d.7 on end # USB (EHCI)
+                        device pci 1e.0 on end # PCI bridge
+                        device pci 1f.0 on     # LPC bridge
+                                chip superio/intel/i3100
+                                        device pnp 4e.4 on # Com1
+                                                 io 0x60 = 0x3f8
+                                                irq 0x70 = 4
+                                        end
+                                        device pnp 4e.5 on # Com2
+                                                 io 0x60 = 0x2f8
+                                                irq 0x70 = 3
+                                        end
+                                end
+				chip superio/smsc/smscsuperio
+					device pnp 2e.0 off	# Floppy
+						io 0x60 = 0x3f0
+						irq 0x70 = 6
+						drq 0x74 = 2
+					end
+					device pnp 2e.2 off	# Serial Port 4
+						io 0x60 = 0x2e8
+						irq 0x70 = 3
+					end
+					device pnp 2e.3 on	# Parallel Port
+						io 0x60 = 0x378
+						irq 0x70 = 7
+						drq 0x74 = 2
+					end
+					device pnp 2e.4 off	# Serial Port 3
+						io 0x60 = 0x3e8
+						irq 0x70 = 4
+					end
+					device pnp 2e.7 on	# PS/2 Keyboard / Mouse
+						io 0x60 = 0x60
+						io 0x62 = 0x64
+						irq 0x70 = 1    # PS/2 keyboard interrupt
+						irq 0x72 = 12   # PS/2 mouse interrupt
+					end
+					device pnp 2e.a off     # Runtime registers
+					       io 0x60 = 0x600
+					end
+				end
+                        end
+                        device pci 1f.2 on end # SATA
+                        device pci 1f.3 on end # SMBus
+			device pci 1f.4 on end # Performance counters
+                end
+        end
+        device apic_cluster 0 on
+                chip cpu/intel/bga956
+                        device apic 0 on end
+                end
+        end
+end
+
diff --git a/src/mainboard/intel/jarrell/Kconfig b/src/mainboard/intel/jarrell/Kconfig
new file mode 100644
index 0000000000..8cfa632acf
--- /dev/null
+++ b/src/mainboard/intel/jarrell/Kconfig
@@ -0,0 +1,33 @@
+config BOARD_INTEL_JARRELL
+	bool "Jarrell"
+	select ARCH_X86
+	select CPU_INTEL_SOCKET_MPGA604
+	select NORTHBRIDGE_INTEL_E7520
+	select SOUTHBRIDGE_INTEL_PXHD
+	select SOUTHBRIDGE_INTEL_I82801ER
+	select SUPERIO_NSC_PC87427
+	select HAVE_PIRQ_TABLE
+	select UDELAY_TSC
+	help
+          Intel Jarrell mainboard.
+
+config MAINBOARD_DIR
+	string
+	default intel/jarrell
+	depends on BOARD_INTEL_JARRELL
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_INTEL_JARRELL
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_INTEL_JARRELL
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "Jarrell"
+	depends on BOARD_INTEL_JARRELL
+
diff --git a/src/mainboard/intel/jarrell/Makefile.inc b/src/mainboard/intel/jarrell/Makefile.inc
new file mode 100644
index 0000000000..7d098f978d
--- /dev/null
+++ b/src/mainboard/intel/jarrell/Makefile.inc
@@ -0,0 +1,4 @@
+obj-y += reset.o
+ROMCCFLAGS := -mcpu=p4
+include $(src)/mainboard/Makefile.romccboard.inc
+
diff --git a/src/mainboard/intel/mtarvon/Kconfig b/src/mainboard/intel/mtarvon/Kconfig
new file mode 100644
index 0000000000..255ddc393d
--- /dev/null
+++ b/src/mainboard/intel/mtarvon/Kconfig
@@ -0,0 +1,41 @@
+config BOARD_INTEL_MTARVON
+	bool "Mt. Arvon"
+	select ARCH_X86
+	select CPU_INTEL_SOCKET_MPGA479M
+	select NORTHBRIDGE_INTEL_I3100
+	select SOUTHBRIDGE_INTEL_I3100
+	select SUPERIO_INTEL_I3100
+	select HAVE_PIRQ_TABLE
+	select UDELAY_TSC
+	help
+          Intel Mt. Arvon mainboard.
+
+config MAINBOARD_DIR
+	string
+	default intel/mtarvon
+	depends on BOARD_INTEL_MTARVON
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_INTEL_MTARVON
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_INTEL_MTARVON
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "Mt. Arvon"
+	depends on BOARD_INTEL_MTARVON
+
+config HAVE_OPTION_TABLE
+	bool
+	default n
+	depends on BOARD_INTEL_MTARVON
+
+config IRQ_SLOT_COUNT
+	int
+	default 1
+	depends on BOARD_INTEL_MTARVON
diff --git a/src/mainboard/intel/mtarvon/Makefile.inc b/src/mainboard/intel/mtarvon/Makefile.inc
new file mode 100644
index 0000000000..a6be734529
--- /dev/null
+++ b/src/mainboard/intel/mtarvon/Makefile.inc
@@ -0,0 +1,3 @@
+ROMCCFLAGS := -mcpu=p4
+include $(src)/mainboard/Makefile.romccboard.inc
+
diff --git a/src/mainboard/intel/truxton/Kconfig b/src/mainboard/intel/truxton/Kconfig
new file mode 100644
index 0000000000..490db9d240
--- /dev/null
+++ b/src/mainboard/intel/truxton/Kconfig
@@ -0,0 +1,43 @@
+config BOARD_INTEL_TRUXTON
+	bool "Truxton"
+	select ARCH_X86
+	select CPU_INTEL_EP80579
+	select NORTHBRIDGE_INTEL_I3100
+	select SOUTHBRIDGE_INTEL_I3100
+	select SUPERIO_INTEL_I3100
+	select SUPERIO_SMSC_SMSCSUPERIO
+	select HAVE_PIRQ_TABLE
+	select UDELAY_TSC
+	help
+          Intel Truxton mainboard.
+
+config MAINBOARD_DIR
+	string
+	default intel/truxton
+	depends on BOARD_INTEL_TRUXTON
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_INTEL_TRUXTON
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_INTEL_TRUXTON
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "Truxton"
+	depends on BOARD_INTEL_TRUXTON
+
+config HAVE_OPTION_TABLE
+	bool
+	default n
+	depends on BOARD_INTEL_TRUXTON
+
+config IRQ_SLOT_COUNT
+	int
+	default 1
+	depends on BOARD_INTEL_TRUXTON
+
diff --git a/src/mainboard/intel/truxton/Makefile.inc b/src/mainboard/intel/truxton/Makefile.inc
new file mode 100644
index 0000000000..59c6b14fa7
--- /dev/null
+++ b/src/mainboard/intel/truxton/Makefile.inc
@@ -0,0 +1,3 @@
+ROMCCFLAGS := -mcpu=p4 -fno-simplify-phi
+include $(src)/mainboard/Makefile.romccboard.inc
+
diff --git a/src/mainboard/intel/xe7501devkit/Kconfig b/src/mainboard/intel/xe7501devkit/Kconfig
new file mode 100644
index 0000000000..db4dbd3305
--- /dev/null
+++ b/src/mainboard/intel/xe7501devkit/Kconfig
@@ -0,0 +1,47 @@
+config BOARD_INTEL_XE7501DEVKIT
+	bool "xe7501 DevKit"
+	select ARCH_X86
+	select CPU_INTEL_SOCKET_MPGA604
+	select NORTHBRIDGE_INTEL_E7501
+	select SOUTHBRIDGE_INTEL_I82870
+	select SOUTHBRIDGE_INTEL_I82801CA
+	select SUPERIO_SMSC_LPC47B272
+	select HAVE_PIRQ_TABLE
+	select UDELAY_TSC
+	help
+          Intel xe7501 devkit mainboard.
+
+config MAINBOARD_DIR
+	string
+	default intel/xe7501devkit
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config LB_CKS_RANGE_START
+	int
+	default 128
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config LB_CKS_RANGE_END
+	int
+	default 130
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config LB_CKS_LOC
+	int
+	default 131
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "EIDXE7501DEVKIT"
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config HAVE_OPTION_TABLE
+	bool
+	default y
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config IRQ_SLOT_COUNT
+	int
+	default 12
+	depends on BOARD_INTEL_XE7501DEVKIT
diff --git a/src/mainboard/intel/xe7501devkit/Makefile.inc b/src/mainboard/intel/xe7501devkit/Makefile.inc
new file mode 100644
index 0000000000..a064b3dd46
--- /dev/null
+++ b/src/mainboard/intel/xe7501devkit/Makefile.inc
@@ -0,0 +1,13 @@
+ROMCCFLAGS := -mcpu=p4
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+ifeq ($(CONFIG_PCI_ROM_RUN),y)
+	ifeq ($(CONFIG_PCI_ROM_RUN),y)
+		obj-y += vgarom.o
+	else
+		obj-y += no_vgarom.o
+	endif
+else
+	obj-y += no_vgarom.o
+endif
+include $(src)/mainboard/Makefile.romccboard.inc
+