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-rw-r--r--src/mainboard/intel/minnow3/bootblock.c5
-rw-r--r--src/mainboard/intel/minnow3/gpio.c3
2 files changed, 6 insertions, 2 deletions
diff --git a/src/mainboard/intel/minnow3/bootblock.c b/src/mainboard/intel/minnow3/bootblock.c
index ceb530b0a3..e2a339138f 100644
--- a/src/mainboard/intel/minnow3/bootblock.c
+++ b/src/mainboard/intel/minnow3/bootblock.c
@@ -1,14 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
+#include <soc/gpio.h>
+
#include "gpio.h"
-void bootblock_mainboard_init(void)
+void bootblock_mainboard_early_init(void)
{
const struct pad_config *pads;
size_t num;
- /* Configure GPIOs needed prior to ramstage. */
pads = early_gpio_table(&num);
gpio_configure_pads(pads, num);
}
diff --git a/src/mainboard/intel/minnow3/gpio.c b/src/mainboard/intel/minnow3/gpio.c
index 2e356d60c2..4c0515d8e9 100644
--- a/src/mainboard/intel/minnow3/gpio.c
+++ b/src/mainboard/intel/minnow3/gpio.c
@@ -279,6 +279,9 @@ const struct pad_config *gpio_table(size_t *num)
/* GPIOs needed prior to ramstage. */
static const struct pad_config early_gpio_table_config[] = {
+ PAD_CFG_NF(GPIO_46, UP_20K, DEEP, NF1), /* LPSS_UART2_RXD */
+ PAD_CFG_NF(GPIO_47, UP_20K, DEEP, NF1), /* LPSS_UART2_TXD */
+
PAD_CFG_NF(GPIO_134, UP_20K, DEEP, NF2), /* ISH_I2C0_SDA/IO-OD */
PAD_CFG_NF(GPIO_135, UP_20K, DEEP, NF2), /* ISH_I2C0_SCL/IO-OD */
PAD_CFG_NF(GPIO_136, UP_20K, DEEP, NF2), /* ISH_I2C1_SDA/IO-OD */