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-rw-r--r--src/mainboard/intel/glkrvp/Kconfig4
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb8
2 files changed, 4 insertions, 8 deletions
diff --git a/src/mainboard/intel/glkrvp/Kconfig b/src/mainboard/intel/glkrvp/Kconfig
index 3380762736..ebb5a3a07b 100644
--- a/src/mainboard/intel/glkrvp/Kconfig
+++ b/src/mainboard/intel/glkrvp/Kconfig
@@ -86,4 +86,8 @@ config IS_GLK_RVP_1
bool "Is this RVP1?"
default n
+config SOC_INTEL_COMMON_BLOCK_SGX_ENABLE
+ bool
+ default y
+
endif # BOARD_INTEL_GLKRVP
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
index d3d0b00c8e..c5ad27dca6 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
@@ -97,14 +97,6 @@ chip soc/intel/apollolake
# Minimum SLP S3 assertion width 28ms.
register "slp_s3_assertion_width_usecs" = "28000"
- register "sgx_enable" = "1"
-
- # PRMRR size options
- # 0x02000000 - 32MiB
- # 0x04000000 - 64MiB
- # 0x08000000 - 128MiB
- register "PrmrrSize" = "128 * MiB"
-
register "pnp_settings" = "PNP_PERF_POWER"
device domain 0 on