diff options
Diffstat (limited to 'src/mainboard/intel/glkrvp/variants/baseboard')
4 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c index 8df1dc4c60..69a0a9116a 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c @@ -21,7 +21,7 @@ int variant_board_id(void) { MAYBE_STATIC uint32_t id = BOARD_ID_INIT; - if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)) { + if (CONFIG(EC_GOOGLE_CHROMEEC)) { if (id == BOARD_ID_INIT) { if (google_chromeec_get_board_version(&id)) id = BOARD_ID_UNKNOWN; diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c index 03f2147006..3cbb4bcd44 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c @@ -91,7 +91,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_64, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/*LPSS_UART2_RXD*/ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_65, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD),/*LPSS_UART2_TXD*/ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_66, 1, DEEP, UP_20K, TxDRxE, DISPUPD),/*RF_KILL_WWAN */ -#if IS_ENABLED(CONFIG_TPM_ON_FAST_SPI) +#if CONFIG(TPM_ON_FAST_SPI) PAD_CFG_GPI_INT(GPIO_67, UP_20K, DEEP, LEVEL),/*SPI TPM Interrupt */ #endif PAD_CFG_NF(GPIO_68, UP_20K, DEEP, NF1),/*PMC_SPI_FS0*/ diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/gpio.h index dc23abd2fc..170e87c988 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/gpio.h @@ -22,7 +22,7 @@ * GPIO_11 for SCI is routed to GPE0_DW1 and maps to group GPIO_GPE_N_31_0 * which is North community */ -#if IS_ENABLED(CONFIG_SOC_ESPI) +#if CONFIG(SOC_ESPI) #define EC_SCI_GPI GPE0A_ESPI_SCI_STS #else #define EC_SCI_GPI GPE0_DW1_05 diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c index 5433bd571c..c35a2923f5 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c @@ -21,15 +21,15 @@ void __weak variant_nhlt_init(struct nhlt *nhlt) { /* 1-dmic configuration */ - if (IS_ENABLED(CONFIG_NHLT_DMIC_1CH_16B) && + if (CONFIG(NHLT_DMIC_1CH_16B) && !nhlt_soc_add_dmic_array(nhlt, 1)) printk(BIOS_ERR, "Added 1CH DMIC array.\n"); /* 2-dmic configuration */ - if (IS_ENABLED(CONFIG_NHLT_DMIC_2CH_16B) && + if (CONFIG(NHLT_DMIC_2CH_16B) && !nhlt_soc_add_dmic_array(nhlt, 2)) printk(BIOS_ERR, "Added 2CH DMIC array.\n"); /* 4-dmic configuration */ - if (IS_ENABLED(CONFIG_NHLT_DMIC_4CH_16B) && + if (CONFIG(NHLT_DMIC_4CH_16B) && !nhlt_soc_add_dmic_array(nhlt, 4)) printk(BIOS_ERR, "Added 4CH DMIC array.\n"); |