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Diffstat (limited to 'src/mainboard/intel/galileo/romstage.c')
-rw-r--r-- | src/mainboard/intel/galileo/romstage.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/mainboard/intel/galileo/romstage.c b/src/mainboard/intel/galileo/romstage.c new file mode 100644 index 0000000000..dfae772580 --- /dev/null +++ b/src/mainboard/intel/galileo/romstage.c @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * Copyright (C) 2015-2016 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <fsp/romstage.h> + +/* All FSP specific code goes in this block */ +void mainboard_romstage_entry(struct romstage_params *rp) +{ + /* Call back into chipset code with platform values updated. */ + romstage_common(rp); +} |