diff options
Diffstat (limited to 'src/mainboard/intel/galileo/Kconfig')
| -rw-r--r-- | src/mainboard/intel/galileo/Kconfig | 108 |
1 files changed, 99 insertions, 9 deletions
diff --git a/src/mainboard/intel/galileo/Kconfig b/src/mainboard/intel/galileo/Kconfig index 2acc439746..0c1fe5b9c5 100644 --- a/src/mainboard/intel/galileo/Kconfig +++ b/src/mainboard/intel/galileo/Kconfig @@ -18,11 +18,10 @@ if BOARD_INTEL_GALILEO config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_8192 - select CREATE_BOARD_CHECKLIST +# select CREATE_BOARD_CHECKLIST select ENABLE_BUILTIN_HSUART1 select HAVE_ACPI_TABLES select SOC_INTEL_QUARK - select USE_FSP1_1 config MAINBOARD_DIR string @@ -45,16 +44,107 @@ config GALILEO_GEN2 runtime. Select which generation of the Galileo that coreboot should initialize. -config USE_FSP1_1 - bool - default n +choice + prompt "FSP version" + default FSP_VERSION_1_1 + +config FSP_VERSION_1_1 + bool "FSP 1.1" + select CREATE_BOARD_CHECKLIST select PLATFORM_USES_FSP1_1 # select ADD_FSP_RAW_BIN - -config USE_FSP2_0 - bool - default n + help + Use FSP 1_1 binary +config FSP_VERSION_2_0 + bool "FSP 2.0" select PLATFORM_USES_FSP2_0 select POSTCAR_STAGE + help + Use FSP 2.0 binary + +endchoice + +config FSP_VERSION + string + default "fsp1_1" if FSP_VERSION_1_1 + default "fsp2_0" if FSP_VERSION_2_0 + +choice + prompt "FSP binary type" + default FSP_BUILD_TYPE_DEBUG + +config FSP_BUILD_TYPE_DEBUG + bool "Debug" + help + Use the debug version of FSP +config FSP_BUILD_TYPE_RELEASE + bool "Release" + help + Use the release version of FSP + +endchoice + +config FSP_BUILD_TYPE + string + default "DEBUG" if FSP_BUILD_TYPE_DEBUG + default "RELEASE" if FSP_BUILD_TYPE_RELEASE + +choice + prompt "FSP type" + depends on FSP_VERSION_2_0 || FSP_VERSION_1_1 + default FSP_TYPE_1_1_PEI if FSP_VERSION_1_1 + default FSP_TYPE_2_0_PEI if FSP_VERSION_2_0 + +config FSP_TYPE_1_1 + bool "MemInit subroutine" + depends on FSP_VERSION_1_1 + help + FSP 1.1 implemented as subroutines, no EDK-II cores +config FSP_TYPE_1_1_PEI + bool "SEC + PEI Core + MemInit PEIM" + depends on FSP_VERSION_1_1 + help + FSP 1.1 implemented using SEC and PEI core +config FSP_TYPE_2_0 + bool "MemInit subroutine" + depends on FSP_VERSION_2_0 + help + FSP 2.0 implemented as subroutines, no EDK-II cores +config FSP_TYPE_2_0_PEI + bool "SEC + PEI Core + MemInit PEIM" + depends on FSP_VERSION_2_0 + help + FSP 2.0 implemented using SEC and PEI core + +endchoice + +config FSP_TYPE + string + default "Fsp1_1" if FSP_TYPE_1_1 + default "Fsp1_1Pei" if FSP_TYPE_1_1_PEI + default "Fsp2_0" if FSP_TYPE_2_0 + default "Fsp2_0Pei" if FSP_TYPE_2_0_PEI + +config FSP_DEBUG_ALL + bool "Enable all FSP debug support" + depends on FSP_VERSION_2_0 || FSP_VERSION_1_1 + default y +# Enable display and verification for coreboot build tests + select BOOTBLOCK_CONSOLE + select DISPLAY_HOBS + select DISPLAY_MTRRS + select DISPLAY_SMM_MEMORY_MAP + select DISPLAY_UPD_DATA + select DISPLAY_ESRAM_LAYOUT if FSP_VERSION_2_0 + select DISPLAY_FSP_CALLS_AND_STATUS if FSP_VERSION_2_0 + select DISPLAY_FSP_HEADER if FSP_VERSION_2_0 + select POSTCAR_CONSOLE if FSP_VERSION_2_0 + select VERIFY_HOBS if FSP_VERSION_2_0 + select DISPLAY_FSP_ENTRY_POINTS if FSP_VERSION_1_1 + help + Turn on debug support to display HOBS, MTRRS, SMM_MEMORY_MAP, UPD_DATA + also turn on FSP 2.0 debug support for ESRAM_LAYOUT, + FSP_CALLS_AND_STATUS, FSP_HEADER, POSTCAR_CONSOLE and VERIFY_HOBS + or FSP 1.1 DISPLAY_FSP_ENTRY_POINTS endif # BOARD_INTEL_QUARK |