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path: root/src/mainboard/intel/emeraldlake2/chromeos.c
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Diffstat (limited to 'src/mainboard/intel/emeraldlake2/chromeos.c')
-rw-r--r--src/mainboard/intel/emeraldlake2/chromeos.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c
index bb4ebe9f54..896f8767f8 100644
--- a/src/mainboard/intel/emeraldlake2/chromeos.c
+++ b/src/mainboard/intel/emeraldlake2/chromeos.c
@@ -20,6 +20,7 @@
#include <device/pci.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
+#include <vendorcode/google/chromeos/chromeos.h>
#ifndef __PRE_RAM__
#include <boot/coreboot_tables.h>
@@ -91,3 +92,14 @@ int get_recovery_mode_switch(void)
/* Recovery: GPIO22, active low */
return !get_gpio(22);
}
+
+static const struct cros_gpio cros_gpios[] = {
+ CROS_GPIO_REC_AL(22, CROS_GPIO_DEVICE_NAME),
+ CROS_GPIO_DEV_AH(57, CROS_GPIO_DEVICE_NAME),
+ CROS_GPIO_WP_AL(48, CROS_GPIO_DEVICE_NAME),
+};
+
+void mainboard_chromeos_acpi_generate(void)
+{
+ chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
+}