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Diffstat (limited to 'src/mainboard/intel/dg43gt/romstage.c')
| -rw-r--r-- | src/mainboard/intel/dg43gt/romstage.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c index 36aa1498b5..aa8c50ec05 100644 --- a/src/mainboard/intel/dg43gt/romstage.c +++ b/src/mainboard/intel/dg43gt/romstage.c @@ -75,9 +75,6 @@ void mainboard_romstage_entry(unsigned long bist) u8 boot_path = 0; u8 s3_resume; - timestamp_init(get_initial_timestamp()); - timestamp_add_now(TS_START_ROMSTAGE); - /* Set southbridge and Super I/O GPIOs. */ ich10_enable_lpc(); mb_gpio_init(); |