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Diffstat (limited to 'src/mainboard/intel/dg43gt/devicetree.cb')
-rw-r--r--src/mainboard/intel/dg43gt/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/intel/dg43gt/devicetree.cb b/src/mainboard/intel/dg43gt/devicetree.cb
index be0b911a5a..38ae29b031 100644
--- a/src/mainboard/intel/dg43gt/devicetree.cb
+++ b/src/mainboard/intel/dg43gt/devicetree.cb
@@ -42,6 +42,9 @@ chip northbridge/intel/x4x # Northbridge
# Enable PCIe ports 0,2,3 as slots.
register "pcie_slot_implemented" = "0xb"
+ register "gen1_dec" = "0x00fc0601"
+ register "gen2_dec" = "0x00fc0291"
+
device pci 19.0 on end # GBE
device pci 1a.0 on end # USB
device pci 1a.1 on end # USB