diff options
Diffstat (limited to 'src/mainboard/intel/d945gclf')
| -rw-r--r-- | src/mainboard/intel/d945gclf/cmos.layout | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/src/mainboard/intel/d945gclf/cmos.layout b/src/mainboard/intel/d945gclf/cmos.layout index e0d6ec5244..58f96f03f1 100644 --- a/src/mainboard/intel/d945gclf/cmos.layout +++ b/src/mainboard/intel/d945gclf/cmos.layout @@ -4,42 +4,18 @@ entries # ----------------------------------------------------------------- -# Status Register A -# ----------------------------------------------------------------- -# Status Register B -# ----------------------------------------------------------------- -# Status Register C -#96 4 r 0 status_c_rsvd -#100 1 r 0 uf_flag -#101 1 r 0 af_flag -#102 1 r 0 pf_flag -#103 1 r 0 irqf_flag -# ----------------------------------------------------------------- -# Status Register D -#104 7 r 0 status_d_rsvd -#111 1 r 0 valid_cmos_ram -# ----------------------------------------------------------------- -# Diagnostic Status Register -#112 8 r 0 diag_rsvd1 - -# ----------------------------------------------------------------- 0 120 r 0 reserved_memory -#120 264 r 0 unused # ----------------------------------------------------------------- # RTC_BOOT_BYTE (coreboot hardcoded) 384 1 e 4 boot_option 388 4 h 0 reboot_counter -#390 2 r 0 unused? # ----------------------------------------------------------------- # coreboot config options: console -#392 3 r 0 unused 395 4 e 6 debug_level -#399 1 r 0 unused # coreboot config options: cpu -#401 7 r 0 unused # coreboot config options: southbridge 408 1 e 1 nmi @@ -50,11 +26,9 @@ entries # coreboot config options: bootloader 416 512 s 0 boot_devices -#928 80 r 0 unused # coreboot config options: check sums 984 16 h 0 check_sum -#1000 24 r 0 amd_reserved # RAM initialization internal data 1024 8 r 0 C0WL0REOST |