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-rw-r--r--src/mainboard/intel/d510mo/Makefile.inc2
-rw-r--r--src/mainboard/intel/d510mo/early_init.c (renamed from src/mainboard/intel/d510mo/romstage.c)3
2 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/intel/d510mo/Makefile.inc b/src/mainboard/intel/d510mo/Makefile.inc
index f3d7e76263..f87689b8a1 100644
--- a/src/mainboard/intel/d510mo/Makefile.inc
+++ b/src/mainboard/intel/d510mo/Makefile.inc
@@ -1,2 +1,4 @@
+bootblock-y += early_init.c
+romstage-y += early_init.c
ramstage-y += cstates.c
romstage-y += gpio.c
diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/early_init.c
index 024c3e10fe..2719e87fe6 100644
--- a/src/mainboard/intel/d510mo/romstage.c
+++ b/src/mainboard/intel/d510mo/early_init.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <device/pci_ops.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <northbridge/intel/pineview/pineview.h>
@@ -23,7 +24,7 @@
#define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1)
#define SUPERIO_DEV PNP_DEV(0x4e, 0)
-void mb_enable_lpc(void)
+void bootblock_mainboard_early_init(void)
{
/* Disable Serial IRQ */
pci_write_config8(PCI_DEV(0, 0x1f, 0), SERIRQ_CNTL, 0x00);