diff options
Diffstat (limited to 'src/mainboard/intel/coffeelake_rvp')
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb index 35aa624481..9648ac345b 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb @@ -5,7 +5,7 @@ chip soc/intel/cannonlake end # FSP configuration - register "SaGv" = "3" + register "SaGv" = "SaGv_Enabled" register "RMT" = "1" register "ScsEmmcHs400Enabled" = "1" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb index bbfc9e7913..126cab01f0 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb @@ -5,7 +5,7 @@ chip soc/intel/cannonlake end # FSP configuration - register "SaGv" = "3" + register "SaGv" = "SaGv_Enabled" register "RMT" = "1" register "ScsEmmcHs400Enabled" = "1" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb index bb963c9523..e5f867cbdc 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb @@ -5,7 +5,7 @@ chip soc/intel/cannonlake end # FSP configuration - register "SaGv" = "3" + register "SaGv" = "SaGv_Enabled" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb index 010ad65103..e30da3af4d 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb @@ -5,7 +5,7 @@ chip soc/intel/cannonlake end # FSP configuration - register "SaGv" = "3" + register "SaGv" = "SaGv_Enabled" register "ScsEmmcHs400Enabled" = "1" register "HeciEnabled" = "1" |