diff options
Diffstat (limited to 'src/mainboard/intel/bayleybay_fsp')
-rw-r--r-- | src/mainboard/intel/bayleybay_fsp/devicetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/bayleybay_fsp/devicetree.cb b/src/mainboard/intel/bayleybay_fsp/devicetree.cb index 1bde834c20..befd3dce25 100644 --- a/src/mainboard/intel/bayleybay_fsp/devicetree.cb +++ b/src/mainboard/intel/bayleybay_fsp/devicetree.cb @@ -50,7 +50,7 @@ chip soc/intel/fsp_baytrail device pci 11.0 on end # 8086 0F15 - SDIO Port (SD2 pins) device pci 12.0 on end # 8086 0F16 - SD Port (SD3 pins) device pci 13.0 on end # 8086 0F23 - SATA AHCI (0F20, 0F21, 0F22, 0F23) - device pci 14.0 off end # 8086 0F35 - USB XHCI - Only 1 USB controller at a time + device pci 14.0 on end # 8086 0F35 - USB XHCI - Only 1 USB controller at a time device pci 15.0 off end # 8086 0F28 - LP Engine Audio device pci 16.0 off end # 8086 0F37 - OTG controller device pci 17.0 on end # 8086 0F50 - EMMC 4.5 Port (MMC1 pins) - Only 1 EMMC port at a time @@ -68,7 +68,7 @@ chip soc/intel/fsp_baytrail device pci 1c.1 on end # 8086 0F4A - PCIe Root Port 2 (half mini pcie slot) device pci 1c.2 on end # 8086 0F4C - PCIe Root Port 3 (front x1 slot) device pci 1c.3 on end # 8086 0F4E - PCIe Root Port 4 (rear x1 slot) - device pci 1d.0 on end # 8086 0F34 - USB EHCI - Only 1 USB controller at a time + device pci 1d.0 off end # 8086 0F34 - USB EHCI - Only 1 USB controller at a time device pci 1e.0 on end # 8086 0F06 - SIO - DMA device pci 1e.1 on end # 8086 0F08 - PWM 1 device pci 1e.2 on end # 8086 0F09 - PWM 2 |