diff options
Diffstat (limited to 'src/mainboard/intel/amenia/chromeos_ramstage.c')
| -rw-r--r-- | src/mainboard/intel/amenia/chromeos_ramstage.c | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/src/mainboard/intel/amenia/chromeos_ramstage.c b/src/mainboard/intel/amenia/chromeos_ramstage.c deleted file mode 100644 index dcc6b90010..0000000000 --- a/src/mainboard/intel/amenia/chromeos_ramstage.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Intel Corp. - * (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <boot/coreboot_tables.h> - -void fill_lb_gpios(struct lb_gpios *gpios) -{ - struct lb_gpio chromeos_gpios[] = { - {-1, ACTIVE_HIGH, 0, "write protect"}, - {-1, ACTIVE_HIGH, 0, "recovery"}, - {-1, ACTIVE_HIGH, 1, "developer"}, - {-1, ACTIVE_HIGH, 1, "lid"}, - {-1, ACTIVE_HIGH, 0, "power"}, - {-1, ACTIVE_HIGH, 0, "oprom"}, - }; - lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); -} |