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Diffstat (limited to 'src/mainboard/intel/adlrvp/gpio.c')
-rw-r--r--src/mainboard/intel/adlrvp/gpio.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c
index d7cc6bdfe4..44549589f7 100644
--- a/src/mainboard/intel/adlrvp/gpio.c
+++ b/src/mainboard/intel/adlrvp/gpio.c
@@ -7,6 +7,10 @@
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
+
+ /* GPIO A0-A6, A9-A10 default function is NF1 for eSPI interface when
+ eSPI is enabled */
+
/* SSD1_PWREN CPU SSD1 */
PAD_CFG_GPO(GPP_D14, 1, PLTRST),
/* SSD1_RESET CPU SSD1 */
@@ -187,13 +191,6 @@ static const struct pad_config gpio_table[] = {
/* I2S0_RXD */
PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2),
- /* I2S2_SFRM */
- PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
- /* I2S2_TXD */
- PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
- /* I2S2_RXD */
- PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
-
/* I2S_MCLK1_OUT */
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
/* I2S_MCLK2_INOUT */
@@ -240,6 +237,7 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_D8, NONE),
PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
+ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
/* DDP1/2/3/4/A/B/C CTRLCLK and CTRLDATA pins */
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF4),