aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/iei/juki-511p
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/iei/juki-511p')
-rw-r--r--src/mainboard/iei/juki-511p/Kconfig47
-rw-r--r--src/mainboard/iei/juki-511p/board_info.txt2
-rw-r--r--src/mainboard/iei/juki-511p/cmos.layout72
-rw-r--r--src/mainboard/iei/juki-511p/devicetree.cb57
-rw-r--r--src/mainboard/iei/juki-511p/irq_tables.c103
-rw-r--r--src/mainboard/iei/juki-511p/romstage.c47
6 files changed, 0 insertions, 328 deletions
diff --git a/src/mainboard/iei/juki-511p/Kconfig b/src/mainboard/iei/juki-511p/Kconfig
deleted file mode 100644
index 0aebb03887..0000000000
--- a/src/mainboard/iei/juki-511p/Kconfig
+++ /dev/null
@@ -1,47 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_IEI_JUKI_511P || BOARD_IEI_ROCKY_512
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_AMD_GEODE_GX1
- select NORTHBRIDGE_AMD_GX1
- select SOUTHBRIDGE_AMD_CS5530
- select SUPERIO_WINBOND_W83977F
- select ROMCC
- select PIRQ_ROUTE
- select HAVE_PIRQ_TABLE
- select HAVE_OPTION_TABLE
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default iei/juki-511p
-
-if BOARD_IEI_JUKI_511P
-config MAINBOARD_PART_NUMBER
- string
- default "JUKI-511P"
-endif # BOARD_IEI_JUKI_511P
-
-config IRQ_SLOT_COUNT
- int
- default 2
-
-endif # BOARD_IEI_JUKI_511P || BOARD_IEI_ROCKY_512
diff --git a/src/mainboard/iei/juki-511p/board_info.txt b/src/mainboard/iei/juki-511p/board_info.txt
deleted file mode 100644
index 3445599893..0000000000
--- a/src/mainboard/iei/juki-511p/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: half
-Board URL: http://www.ieiworld.com/en/news_content.asp?id=erbium/projectOBJ00150613
diff --git a/src/mainboard/iei/juki-511p/cmos.layout b/src/mainboard/iei/juki-511p/cmos.layout
deleted file mode 100644
index 9050c3db7a..0000000000
--- a/src/mainboard/iei/juki-511p/cmos.layout
+++ /dev/null
@@ -1,72 +0,0 @@
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-385 1 e 4 last_boot
-386 1 e 1 ECC_memory
-388 4 r 0 reboot_bits
-392 3 e 5 baud_rate
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-1008 16 h 0 check_sum
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-5 0 115200
-5 1 57600
-5 2 38400
-5 3 19200
-5 4 9600
-5 5 4800
-5 6 2400
-5 7 1200
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-
-checksums
-
-checksum 392 1007 1008
diff --git a/src/mainboard/iei/juki-511p/devicetree.cb b/src/mainboard/iei/juki-511p/devicetree.cb
deleted file mode 100644
index 4706ff59f6..0000000000
--- a/src/mainboard/iei/juki-511p/devicetree.cb
+++ /dev/null
@@ -1,57 +0,0 @@
-chip northbridge/amd/gx1
- device domain 0 on
- device pci 0.0 on end
- chip southbridge/amd/cs5530
-
- device pci 12.0 on
- chip superio/winbond/w83977f
- device pnp 3f0.0 on # FDC
- irq 0x70 = 6
- end
- device pnp 3f0.1 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 3f0.2 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 3f0.3 on # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 3f0.4 on # RTC
- io 0x60 = 0x070
- irq 0x70 = 8
- end
- device pnp 3f0.5 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1 # Int 1 for PS/2 keyboard
- irq 0x72 = 12 # Int 12 for PS/2 mouse
- end
- device pnp 3f0.6 off # IR
- end
- device pnp 3f0.7 off # GPIO1
- end
- device pnp 3f0.8 off # GPIO
- end
- end
- device pci 12.1 on end # SMI
- device pci 12.2 on end # IDE
- device pci 12.3 on end # Audio
- device pci 12.4 on end # VGA onboard
-
- end
-
- device pci 0e.0 on end # ETH0
- device pci 13.0 on end # USB
-
- end
- end
-
- chip cpu/amd/geode_gx1
- end
-
-end
-
diff --git a/src/mainboard/iei/juki-511p/irq_tables.c b/src/mainboard/iei/juki-511p/irq_tables.c
deleted file mode 100644
index 7d8e800f3a..0000000000
--- a/src/mainboard/iei/juki-511p/irq_tables.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/pirq_routing.h>
-
-#define IRQ_BITMAP_LINK0 0x0800 /* chipset's INTA# input should be routed to IRQ11 */
-#define IRQ_BITMAP_LINK1 0x0400 /* chipset's INTB# input should be routed to IRQ10 */
-#define IRQ_BITMAP_LINK2 0x0000 /* chipset's INTC# input should be routed to nothing (disabled) */
-#define IRQ_BITMAP_LINK3 0x0000 /* chipset's INTD# input should be routed to nothing (disabled) */
-
-static const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE, /* u32 signature */
- PIRQ_VERSION, /* u16 version */
- 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be a total of CONFIG_IRQ_SLOT_COUNT devices on the bus */
- 0x00, /* Where the interrupt router lies (bus) */
- (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
- 0xc00, /* IRQs devoted exclusively to PCI usage */
- 0x1078, /* Vendor */
- 0x2, /* Device */
- 0, /* Miniport data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0x57, /* u8 checksum. This has to be set to some
- value that would give 0 after the sum of all
- bytes for this structure (including checksum) */
-
- .slots = {
- [0] = {
- .slot = 0x0, /* should be 0 when it is no real slot. My device is soldered */
- .bus = 0x00,
- .devfn = (0x13<<3)|0x0, /* 0x13 is my USB OHCI */
- .irq = {
- [0] = { /* <-- 0 means this is INTA# output from the device or slot */
- .link = 0x01, /* 0x01 means its connected to INTA# input at chipset */
- .bitmap = IRQ_BITMAP_LINK0
- },
- [1] = { /* <-- 1 means this is INTB# output from the device or slot */
- .link = 0x02, /* 0x02 means its connected to INTB# input at chipset */
- .bitmap = IRQ_BITMAP_LINK1
- },
- [2] = { /* <-- 2 means this is INTC# output from the device or slot */
- .link = 0x03, /* 0x03 means its connected to INTC# input at chipset */
- .bitmap = IRQ_BITMAP_LINK2
- },
- [3] = { /* <-- 3 means this is INTD# output from the device or slot */
- .link = 0x04, /* 0x04 means its connected to INTD# input at chipset */
- .bitmap = IRQ_BITMAP_LINK3
- }
- }
- },
-
- [1] = {
- .slot = 0x0, /* means also "on board" */
- .bus = 0x00,
- .devfn = (0x0e<<3)|0x0, /* 0x0e is my Realtek Network device */
- .irq = {
- [0] = { /* <-- 0 means this is INTA# output from the device or slot */
- .link = 0x02, /* 0x02 means its connected to INTB# input at chipset */
- .bitmap = IRQ_BITMAP_LINK1
- },
- [1] = { /* <-- 1 means this is INTB# output from the device or slot */
- .link = 0x03, /* 0x03 means its connected to INTC# input at chipset */
- .bitmap = IRQ_BITMAP_LINK2
- },
- [2] = { /* <-- 2 means this is INTC# output from the device or slot */
- .link = 0x04, /* 0x04 means its connected to INTD# input at chipset */
- .bitmap = IRQ_BITMAP_LINK3
- },
- [3] = { /* <-- 3 means this is INTD# output from the device or slot */
- .link = 0x01, /* 0x01 means its connected to INTA# input at chipset */
- .bitmap = IRQ_BITMAP_LINK0
- }
- }
- }
- }
-};
-
-/**
- * Copy the IRQ routing table to memory.
- *
- * @param addr Destination address (between 0xF0000...0x100000).
- * @return The end address of the pirq routing table in memory.
- */
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/iei/juki-511p/romstage.c b/src/mainboard/iei/juki-511p/romstage.c
deleted file mode 100644
index a58407a524..0000000000
--- a/src/mainboard/iei/juki-511p/romstage.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include "superio/winbond/w83977f/early_serial.c"
-#include "southbridge/amd/cs5530/enable_rom.c"
-#include "cpu/x86/bist.h"
-#include "drivers/pc80/udelay_io.c"
-#include "northbridge/amd/gx1/raminit.c"
-
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1)
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
-
- /* Disable Watchdog Timer. */
- inb(0x043);
- inb(0x843);
-
- cs5530_enable_rom();
- sdram_init();
-}