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-rw-r--r--src/mainboard/ibm/e326/Config.lb29
-rw-r--r--src/mainboard/ibm/e326/Options.lb16
-rw-r--r--src/mainboard/ibm/e326/reset.c6
3 files changed, 25 insertions, 26 deletions
diff --git a/src/mainboard/ibm/e326/Config.lb b/src/mainboard/ibm/e326/Config.lb
index 604a82d46d..0f84978ae6 100644
--- a/src/mainboard/ibm/e326/Config.lb
+++ b/src/mainboard/ibm/e326/Config.lb
@@ -45,6 +45,7 @@ arch i386 end
driver mainboard.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
+object reset.o
##
## Romcc output
@@ -128,6 +129,12 @@ config chip.h
chip northbridge/amd/amdk8/root_complex
+ device apic_cluster 0 on
+ chip cpu/amd/socket_940
+ device apic 0 on end
+ end
+ end
+
device pci_domain 0 on
chip northbridge/amd/amdk8
device pci 18.0 on end # LDT 0
@@ -144,6 +151,10 @@ chip northbridge/amd/amdk8/root_complex
device pci 0.1 on end
device pci 0.2 on end
device pci 1.0 off end
+ chip drivers/pci/onboard
+ device pci 5.0 on end # ATI Rage XL
+ register "rom_address" = "0xfff80000"
+ end
end
device pci 1.0 on
chip superio/NSC/pc87366
@@ -182,6 +193,8 @@ chip northbridge/amd/amdk8/root_complex
device pci 1.3 on end
device pci 1.5 off end
device pci 1.6 off end
+ register "ide0_enable" = "1"
+ register "ide1_enable" = "1"
end
end # device pci 18.0
device pci 18.0 on end # LDT2
@@ -189,22 +202,6 @@ chip northbridge/amd/amdk8/root_complex
device pci 18.2 on end
device pci 18.3 on end
end
- chip northbridge/amd/amdk8
- device pci 19.0 on end
- device pci 19.0 on end
- device pci 19.0 on end
- device pci 19.1 on end
- device pci 19.2 on end
- device pci 19.3 on end
- end
end
- device apic_cluster 0 on
- chip cpu/amd/socket_940
- device apic 0 on end
- end
- chip cpu/amd/socket_940
- device apic 1 on end
- end
- end
end
diff --git a/src/mainboard/ibm/e326/Options.lb b/src/mainboard/ibm/e326/Options.lb
index 0a1c6666d1..8a3cbf4511 100644
--- a/src/mainboard/ibm/e326/Options.lb
+++ b/src/mainboard/ibm/e326/Options.lb
@@ -3,9 +3,6 @@ uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
-uses HARD_RESET_BUS
-uses HARD_RESET_DEVICE
-uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
@@ -46,6 +43,8 @@ uses CROSS_COMPILE
uses CC
uses HOSTCC
uses OBJCOPY
+uses CONFIG_CONSOLE_VGA
+uses CONFIG_PCI_ROM_RUN
uses CONFIG_USE_INIT
@@ -75,13 +74,6 @@ default HAVE_FALLBACK_BOOT=1
default HAVE_HARD_RESET=1
##
-## Funky hard reset implementation
-##
-default HARD_RESET_BUS=1
-default HARD_RESET_DEVICE=4
-default HARD_RESET_FUNCTION=0
-
-##
## Build code to export a programmable irq routing table
##
default HAVE_PIRQ_TABLE=1
@@ -118,6 +110,10 @@ default CONFIG_MAX_PHYSICAL_CPUS=2
##
default CONFIG_IOAPIC=1
+#VGA
+default CONFIG_CONSOLE_VGA=1
+default CONFIG_PCI_ROM_RUN=1
+
##
## Clean up the motherboard id strings
##
diff --git a/src/mainboard/ibm/e326/reset.c b/src/mainboard/ibm/e326/reset.c
new file mode 100644
index 0000000000..7f58d01410
--- /dev/null
+++ b/src/mainboard/ibm/e326/reset.c
@@ -0,0 +1,6 @@
+#include "../../../southbridge/amd/amd8111/amd8111_reset.c"
+
+void hard_reset(void)
+{
+ amd8111_hard_reset(0, 1);
+}