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-rw-r--r--src/mainboard/ibase/mb899/romstage.c29
1 files changed, 7 insertions, 22 deletions
diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c
index 53750dfc08..cd131705b9 100644
--- a/src/mainboard/ibase/mb899/romstage.c
+++ b/src/mainboard/ibase/mb899/romstage.c
@@ -26,6 +26,7 @@
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
+#include <lib.h>
#include "superio/winbond/w83627ehg/w83627ehg.h"
@@ -34,21 +35,17 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
-#if CONFIG_USBDEBUG
-#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
-#include "pc80/usbdebug_serial.c"
-#endif
-
-#include "lib/ramtest.c"
-#include "southbridge/intel/i82801gx/i82801gx_early_smbus.c"
#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c"
-#include "northbridge/intel/i945/udelay.c"
-
#define SERIAL_DEV PNP_DEV(0x4e, W83627EHG_SP1)
+#include "northbridge/intel/i945/i945.h"
+#include "northbridge/intel/i945/raminit.h"
#include "southbridge/intel/i82801gx/i82801gx.h"
-static void setup_ich7_gpios(void)
+
+void enable_smbus(void);
+
+void setup_ich7_gpios(void)
{
printk(BIOS_DEBUG, " GPIOS...");
/* General Registers */
@@ -64,18 +61,6 @@ static void setup_ich7_gpios(void)
outl(0x00010035, DEFAULT_GPIOBASE + 0x38); /* GP_LVL */
}
-#include "northbridge/intel/i945/early_init.c"
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
- return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/i945/raminit.h"
-#include "northbridge/intel/i945/raminit.c"
-#include "northbridge/intel/i945/errata.c"
-#include "northbridge/intel/i945/debug.c"
-
static void ich7_enable_lpc(void)
{
// Enable Serial IRQ