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-rw-r--r--src/mainboard/ibase/mb899/devicetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb
index 1b59fcc1b9..51ca420557 100644
--- a/src/mainboard/ibase/mb899/devicetree.cb
+++ b/src/mainboard/ibase/mb899/devicetree.cb
@@ -34,8 +34,8 @@ chip northbridge/intel/i945
# 2 SCI (if corresponding GPIO_EN bit is also set)
register "gpi13_routing" = "1"
- register "ide_enable_primary" = "0x1"
- register "ide_enable_secondary" = "0x0"
+ register "ide_enable_primary" = "true"
+ register "ide_enable_secondary" = "false"
register "c3_latency" = "85"
register "p_cnt_throttling_supported" = "0"