diff options
Diffstat (limited to 'src/mainboard/hp')
| -rw-r--r-- | src/mainboard/hp/dl145_g3/mptable.c | 2 | ||||
| -rw-r--r-- | src/mainboard/hp/dl145_g3/romstage.c | 13 |
2 files changed, 7 insertions, 8 deletions
diff --git a/src/mainboard/hp/dl145_g3/mptable.c b/src/mainboard/hp/dl145_g3/mptable.c index 6aa3f0e404..e9ce35f888 100644 --- a/src/mainboard/hp/dl145_g3/mptable.c +++ b/src/mainboard/hp/dl145_g3/mptable.c @@ -46,7 +46,7 @@ static void *smp_write_config_table(void *v) { static const char sig[4] = "PCMP"; - static const char oem[8] = "HP "; + static const char oem[8] = "COREBOOT"; static const char productid[12] = "TREX "; struct mp_config_table *mc; diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index 218304e2f5..2e4d4109df 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -185,7 +185,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) DIMM5, DIMM7, 0, 0, }; - struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); int needs_reset; unsigned bsp_apicid = 0; @@ -216,8 +217,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // setup_early_ipmi_serial(); pilot_early_init(SERIAL_DEV); //config port is being taken from SERIAL_DEV printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); - - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); + printk(BIOS_DEBUG, "bsp_apicid=%02x\n", bsp_apicid); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -243,7 +243,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); + printk(BIOS_DEBUG, "begin msr fid, vid %08x %08x\n", msr.hi, msr.lo); } enable_fid_change(); enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); @@ -252,7 +252,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); + printk(BIOS_DEBUG, "end msr fid, vid %08x %08x\n", msr.hi, msr.lo); } #endif @@ -261,7 +261,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\n"); + printk(BIOS_INFO, "ht reset -\n"); soft_reset(); } @@ -278,6 +278,5 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); post_cache_as_ram(); - } |