aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/hp/dl145_g3/romstage.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/hp/dl145_g3/romstage.c')
-rw-r--r--src/mainboard/hp/dl145_g3/romstage.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index 48a4f9d658..e53b52712d 100644
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -158,9 +158,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
printk(BIOS_DEBUG, "bsp_apicid=%02x\n", bsp_apicid);
-#if CONFIG_MEM_TRAIN_SEQ == 1
set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
-#endif
setup_coherent_ht_domain();
wait_all_core0_started();