diff options
Diffstat (limited to 'src/mainboard/hp/dl145_g1/romstage.c')
| -rw-r--r-- | src/mainboard/hp/dl145_g1/romstage.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c index 46831322e8..5420df13ef 100644 --- a/src/mainboard/hp/dl145_g1/romstage.c +++ b/src/mainboard/hp/dl145_g1/romstage.c @@ -16,7 +16,7 @@ #include "southbridge/amd/amd8111/early_smbus.c" #include <northbridge/amd/amdk8/raminit.h> #include "northbridge/amd/amdk8/reset_test.c" -#include "northbridge/amd/amdk8/debug.c" + #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include <cpu/x86/bist.h> @@ -39,7 +39,7 @@ static void memreset_setup(void) } } -static void memreset(int controllers, const struct mem_controller *ctrl) +void memreset(int controllers, const struct mem_controller *ctrl) { if (is_cpu_pre_c0()) { udelay(800); @@ -51,7 +51,7 @@ static void memreset(int controllers, const struct mem_controller *ctrl) #define SMBUS_HUB 0x18 -static inline void activate_spd_rom(const struct mem_controller *ctrl) +void activate_spd_rom(const struct mem_controller *ctrl) { int ret,i; unsigned device=(ctrl->channel0[0])>>8; @@ -76,7 +76,7 @@ static inline void change_i2c_mux(unsigned device) printk(BIOS_DEBUG, "change_i2c_mux 2 ret=%08x\n", ret); } -static inline int spd_read_byte(unsigned device, unsigned address) +int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } |