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-rw-r--r--src/mainboard/google/hatch/variants/jinlon/mainboard.c11
-rw-r--r--src/mainboard/google/hatch/variants/jinlon/overridetree.cb2
2 files changed, 4 insertions, 9 deletions
diff --git a/src/mainboard/google/hatch/variants/jinlon/mainboard.c b/src/mainboard/google/hatch/variants/jinlon/mainboard.c
index cf9344ee5a..d2e5b43bcd 100644
--- a/src/mainboard/google/hatch/variants/jinlon/mainboard.c
+++ b/src/mainboard/google/hatch/variants/jinlon/mainboard.c
@@ -4,7 +4,6 @@
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <device/device.h>
-#include <drivers/gfx/generic/chip.h>
#include <variant/sku.h>
static bool eps_sku(uint32_t sku_id)
@@ -21,23 +20,19 @@ static bool eps_sku(uint32_t sku_id)
static void check_for_eps(uint32_t sku_id)
{
- struct device *gfx_dev;
+ struct device *gfx_dev = DEV_PTR(igpu);
if (eps_sku(sku_id)) {
printk(BIOS_INFO, "SKU ID %u has EPS\n", sku_id);
return;
}
- gfx_dev = find_gfx_dev();
if (!gfx_dev) {
- printk(BIOS_ERR,
- "Error! No EPS dev, view-angle-management won't work\n");
+ printk(BIOS_ERR, "Error! No EPS dev, view-angle-management won't work\n");
return;
}
- printk(BIOS_INFO,
- "SKU ID %u doesn't have EPS, disabling...\n",
- sku_id);
+ printk(BIOS_INFO, "SKU ID %u doesn't have EPS, disabling...\n", sku_id);
gfx_dev->enabled = 0;
}
diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
index 16402af784..b3887d4db1 100644
--- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
@@ -69,7 +69,7 @@ chip soc/intel/cannonlake
register "ScsEmmcHs400Enabled" = "1"
device domain 0 on
- device pci 02.0 on # Integrated Graphics Device
+ device pci 02.0 alias igpu on # Integrated Graphics Device
register "gfx" = "GMA_DEFAULT_PANEL(0)"
end
device pci 02.0 on