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-rw-r--r--src/mainboard/google/poppy/Kconfig1
-rw-r--r--src/mainboard/google/poppy/variants/nautilus/devicetree.cb9
-rw-r--r--src/mainboard/google/poppy/variants/nautilus/gpio.c2
3 files changed, 11 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig
index 1734ac05dd..d4679f62b0 100644
--- a/src/mainboard/google/poppy/Kconfig
+++ b/src/mainboard/google/poppy/Kconfig
@@ -2,6 +2,7 @@
config BOARD_GOOGLE_BASEBOARD_POPPY
def_bool n
select BOARD_ROMSIZE_KB_16384
+ select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select EC_GOOGLE_CHROMEEC
diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
index d5aed6e85b..be8ab5b55d 100644
--- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
@@ -321,6 +321,15 @@ chip soc/intel/skylake
register "hid_desc_reg_offset" = "0x1"
device i2c 0x9 on end
end
+ chip drivers/generic/gpio_keys
+ register "name" = ""PENH""
+ register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_B19)"
+ register "key.dev_name" = ""EJCT""
+ register "key.linux_code" = "SW_PEN_INSERTED"
+ register "key.linux_input_type" = "EV_SW"
+ register "key.label" = ""pen_eject""
+ device generic 0 on end
+ end
end # I2C #3
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
diff --git a/src/mainboard/google/poppy/variants/nautilus/gpio.c b/src/mainboard/google/poppy/variants/nautilus/gpio.c
index fea9da3542..72ffc62671 100644
--- a/src/mainboard/google/poppy/variants/nautilus/gpio.c
+++ b/src/mainboard/google/poppy/variants/nautilus/gpio.c
@@ -101,7 +101,7 @@ static const struct pad_config gpio_table[] = {
/* B18 : GSPI0_MOSI ==> NC */
PAD_CFG_NC(GPP_B18),
/* B19 : GSPI1_CS# ==> CHP3_PEN_EJECT - for notification */
- PAD_CFG_GPI(GPP_B19, NONE, DEEP),
+ PAD_CFG_GPI_GPIO_DRIVER(GPP_B19, NONE, DEEP),
/* B20 : GSPI1_CLK ==> NC */
PAD_CFG_NC(GPP_B20),
/* B21 : GSPI1_MISO ==> CHP3_PEN_EJECT - for wake event */