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-rw-r--r--src/mainboard/google/beltino/devicetree.cb4
-rw-r--r--src/mainboard/google/jecht/devicetree.cb4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb
index 89758dd1f5..f4c9e850ab 100644
--- a/src/mainboard/google/beltino/devicetree.cb
+++ b/src/mainboard/google/beltino/devicetree.cb
@@ -55,10 +55,6 @@ chip northbridge/intel/haswell
register "sata_port_map" = "0x1"
register "sata_devslp_disable" = "0x1"
- register "sio_acpi_mode" = "0"
- register "sio_i2c0_voltage" = "0" # 3.3V
- register "sio_i2c1_voltage" = "0" # 3.3V
-
# Force enable ASPM for PCIe Port 4
register "pcie_port_force_aspm" = "0x10"
diff --git a/src/mainboard/google/jecht/devicetree.cb b/src/mainboard/google/jecht/devicetree.cb
index d34bf7a5d5..19d0c48e07 100644
--- a/src/mainboard/google/jecht/devicetree.cb
+++ b/src/mainboard/google/jecht/devicetree.cb
@@ -30,10 +30,6 @@ chip soc/intel/broadwell
register "sata_port_map" = "0x1"
register "sata_devslp_disable" = "0x1"
- register "sio_acpi_mode" = "0"
- register "sio_i2c0_voltage" = "0" # 3.3V
- register "sio_i2c1_voltage" = "0" # 3.3V
-
# Force enable ASPM for PCIe Port 4
register "pcie_port_force_aspm" = "0x10"