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-rw-r--r--src/mainboard/google/beltino/acpi/haswell_pci_irqs.asl8
-rw-r--r--src/mainboard/google/beltino/variants/mccloud/led.c6
-rw-r--r--src/mainboard/google/beltino/variants/tricky/led.c10
-rw-r--r--src/mainboard/google/butterfly/Kconfig2
-rw-r--r--src/mainboard/google/cyan/variants/cyan/include/variant/onboard.h6
-rw-r--r--src/mainboard/google/jecht/led.c6
-rw-r--r--src/mainboard/google/link/i915.c6
-rw-r--r--src/mainboard/google/link/i915io.h2
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/devicetree.cb2
-rw-r--r--src/mainboard/google/octopus/variants/bip/devicetree.cb2
-rw-r--r--src/mainboard/google/rambi/variants/squawks/devicetree.cb2
-rw-r--r--src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl8
12 files changed, 30 insertions, 30 deletions
diff --git a/src/mainboard/google/beltino/acpi/haswell_pci_irqs.asl b/src/mainboard/google/beltino/acpi/haswell_pci_irqs.asl
index 68ea474b51..0900a3df41 100644
--- a/src/mainboard/google/beltino/acpi/haswell_pci_irqs.asl
+++ b/src/mainboard/google/beltino/acpi/haswell_pci_irqs.asl
@@ -31,9 +31,9 @@ Method(_PRT)
Package() { 0x001cffff, 1, 0, 17 },
Package() { 0x001cffff, 2, 0, 18 },
Package() { 0x001cffff, 3, 0, 19 },
- // EHCI 0:1d.0
+ // EHCI 0:1d.0
Package() { 0x001dffff, 0, 0, 19 },
- // XHCI 0:14.0
+ // XHCI 0:14.0
Package() { 0x0014ffff, 0, 0, 18 },
// LPC devices 0:1f.0
Package() { 0x001fffff, 0, 0, 22 },
@@ -61,9 +61,9 @@ Method(_PRT)
Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
- // EHCI 0:1d.0
+ // EHCI 0:1d.0
Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
- // XHCI 0:14.0
+ // XHCI 0:14.0
Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
// LPC device 0:1f.0
Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
diff --git a/src/mainboard/google/beltino/variants/mccloud/led.c b/src/mainboard/google/beltino/variants/mccloud/led.c
index b47e50a5a1..332f4c7f93 100644
--- a/src/mainboard/google/beltino/variants/mccloud/led.c
+++ b/src/mainboard/google/beltino/variants/mccloud/led.c
@@ -20,11 +20,11 @@
void set_power_led(int state)
{
it8772f_gpio_led(IT8772F_GPIO_DEV,
- 1, /* set */
- 0x01, /* select */
+ 1, /* set */
+ 0x01, /* select */
state == LED_BLINK ? 0x01 : 0x00, /* polarity */
state == LED_BLINK ? 0x01 : 0x00, /* pullup/pulldown */
- 0x01, /* output */
+ 0x01, /* output */
state == LED_BLINK ? 0x00 : 0x01, /* I/O function */
SIO_GPIO_BLINK_GPIO10,
IT8772F_GPIO_BLINK_FREQUENCY_1_HZ);
diff --git a/src/mainboard/google/beltino/variants/tricky/led.c b/src/mainboard/google/beltino/variants/tricky/led.c
index e6ca6eb8d0..e688a0cc64 100644
--- a/src/mainboard/google/beltino/variants/tricky/led.c
+++ b/src/mainboard/google/beltino/variants/tricky/led.c
@@ -20,12 +20,12 @@
void set_power_led(int state)
{
it8772f_gpio_led(IT8772F_GPIO_DEV,
- 2, /* set */
- 0xF7, /* select */
+ 2, /* set */
+ 0xF7, /* select */
state == LED_OFF ? 0x00 : 0x04, /* polarity */
- state == LED_BLINK ? 0x04 : 0x00, /* pullup/pulldown */
- 0x04, /* output */
- state == LED_BLINK ? 0x00 : 0x04, /* I/O function */
+ state == LED_BLINK ? 0x04 : 0x00, /* pullup/pulldown */
+ 0x04, /* output */
+ state == LED_BLINK ? 0x00 : 0x04, /* I/O function */
SIO_GPIO_BLINK_GPIO22,
IT8772F_GPIO_BLINK_FREQUENCY_1_HZ);
}
diff --git a/src/mainboard/google/butterfly/Kconfig b/src/mainboard/google/butterfly/Kconfig
index 1f4547dedd..884d80079d 100644
--- a/src/mainboard/google/butterfly/Kconfig
+++ b/src/mainboard/google/butterfly/Kconfig
@@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_LPC_TPM
select INTEL_INT15
- select SERIRQ_CONTINUOUS_MODE # Workaround for EC/KBC IRQ1.
+ select SERIRQ_CONTINUOUS_MODE # Workaround for EC/KBC IRQ1.
config VBOOT
select VBOOT_VBNV_CMOS
diff --git a/src/mainboard/google/cyan/variants/cyan/include/variant/onboard.h b/src/mainboard/google/cyan/variants/cyan/include/variant/onboard.h
index a27e47d511..883f9b98b9 100644
--- a/src/mainboard/google/cyan/variants/cyan/include/variant/onboard.h
+++ b/src/mainboard/google/cyan/variants/cyan/include/variant/onboard.h
@@ -64,9 +64,9 @@
#define AUDIO_CODEC_DDN "Maxim 98090 Codec "
#define AUDIO_CODEC_I2C_ADDR 0x10
-#define TI_SWITCH_HID "104C227E"
-#define TI_SWITCH_CID "104C227E"
-#define TI_SWITCH_DDN "TI SWITCH "
+#define TI_SWITCH_HID "104C227E"
+#define TI_SWITCH_CID "104C227E"
+#define TI_SWITCH_DDN "TI SWITCH "
#define TI_SWITCH_I2C_ADDR 0x3B
#define DPTF_CPU_PASSIVE 88
diff --git a/src/mainboard/google/jecht/led.c b/src/mainboard/google/jecht/led.c
index 286b65e542..d7faafb245 100644
--- a/src/mainboard/google/jecht/led.c
+++ b/src/mainboard/google/jecht/led.c
@@ -28,11 +28,11 @@ void set_power_led(int state)
}
it8772f_gpio_led(IT8772F_GPIO_DEV,
- 1, /* set */
- 0x01, /* select */
+ 1, /* set */
+ 0x01, /* select */
polarity, /* polarity */
state == LED_BLINK ? 0x01 : 0x00, /* pullup/pulldown */
- 0x01, /* output */
+ 0x01, /* output */
state == LED_BLINK ? 0x00 : 0x01, /* I/O function */
SIO_GPIO_BLINK_GPIO10,
IT8772F_GPIO_BLINK_FREQUENCY_1_HZ);
diff --git a/src/mainboard/google/link/i915.c b/src/mainboard/google/link/i915.c
index 9ab31494f5..9a87ef39bd 100644
--- a/src/mainboard/google/link/i915.c
+++ b/src/mainboard/google/link/i915.c
@@ -305,7 +305,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info,
auxout[0] = 1 << 31 /* dp */|0x0 << 28/*W*/|DP_TRAINING_PATTERN_SET << 8|0x0;
auxout[1] = 0x21000000;
/* DP_TRAINING_PATTERN_1 | DP_LINK_SCRAMBLING_DISABLE |
- * DP_SYMBOL_ERROR_COUNT_BOTH |0x00000021*/
+ * DP_SYMBOL_ERROR_COUNT_BOTH |0x00000021*/
intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 5, auxin, 0);
index = run(index);
auxout[0] = 1 << 31 /* dp */|0x0 << 28/*W*/|DP_TRAINING_LANE0_SET << 8|0x3;
@@ -319,7 +319,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info,
auxout[0] = 1 << 31 /* dp */|0x0 << 28/*W*/|DP_TRAINING_PATTERN_SET << 8|0x0;
auxout[1] = 0x22000000;
/* DP_TRAINING_PATTERN_2 | DP_LINK_SCRAMBLING_DISABLE |
- * DP_SYMBOL_ERROR_COUNT_BOTH |0x00000022*/
+ * DP_SYMBOL_ERROR_COUNT_BOTH |0x00000022*/
intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 5, auxin, 0);
index = run(index);
auxout[0] = 1 << 31 /* dp */|0x0 << 28/*W*/|DP_TRAINING_LANE0_SET << 8|0x3;
@@ -333,7 +333,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info,
auxout[0] = 1 << 31 /* dp */|0x0 << 28/*W*/|DP_TRAINING_PATTERN_SET << 8|0x0;
auxout[1] = 0x00000000;
/* DP_TRAINING_PATTERN_DISABLE | DP_LINK_QUAL_PATTERN_DISABLE |
- * DP_SYMBOL_ERROR_COUNT_BOTH |0x00000000*/
+ * DP_SYMBOL_ERROR_COUNT_BOTH |0x00000000*/
intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 5, auxin, 0);
index = run(index);
diff --git a/src/mainboard/google/link/i915io.h b/src/mainboard/google/link/i915io.h
index 42893ae5b8..c7663d4db0 100644
--- a/src/mainboard/google/link/i915io.h
+++ b/src/mainboard/google/link/i915io.h
@@ -48,7 +48,7 @@
* 2 -> print IO ops
* 4 -> print the number of times we spin on a register in a poll
* 8 -> restore whatever the previous verbosity level was
- * (only one deep stack)
+ * (only one deep stack)
*
* Again, this is not really meant for human consumption. There is not a poll
* operator as such because, sometimes, there is a read/write/read where the
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
index fa86cc4ae9..97bb69142d 100644
--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
@@ -184,7 +184,7 @@ chip soc/intel/apollolake
register "has_power_resource" = "1"
device i2c 10 on end
end
- end # - I2C 7
+ end # - I2C 7
device pci 18.0 on end # - UART 0
device pci 18.1 off end # - UART 1
device pci 18.2 on end # - UART 2
diff --git a/src/mainboard/google/octopus/variants/bip/devicetree.cb b/src/mainboard/google/octopus/variants/bip/devicetree.cb
index fcfaa4a9a3..7520110ca7 100644
--- a/src/mainboard/google/octopus/variants/bip/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/bip/devicetree.cb
@@ -180,7 +180,7 @@ chip soc/intel/apollolake
register "has_power_resource" = "1"
device i2c 10 on end
end
- end # - I2C 7
+ end # - I2C 7
device pci 18.0 on end # - UART 0
device pci 18.1 off end # - UART 1
device pci 18.2 on end # - UART 2
diff --git a/src/mainboard/google/rambi/variants/squawks/devicetree.cb b/src/mainboard/google/rambi/variants/squawks/devicetree.cb
index 26a915d856..46f2385082 100644
--- a/src/mainboard/google/rambi/variants/squawks/devicetree.cb
+++ b/src/mainboard/google/rambi/variants/squawks/devicetree.cb
@@ -1,6 +1,6 @@
chip soc/intel/baytrail
- # SATA port enable mask (2 ports)
+ # SATA port enable mask (2 ports)
register "sata_port_map" = "0x1"
register "sata_ahci" = "0x1"
register "ide_legacy_combined" = "0x0"
diff --git a/src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl b/src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl
index 68ea474b51..0900a3df41 100644
--- a/src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl
+++ b/src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl
@@ -31,9 +31,9 @@ Method(_PRT)
Package() { 0x001cffff, 1, 0, 17 },
Package() { 0x001cffff, 2, 0, 18 },
Package() { 0x001cffff, 3, 0, 19 },
- // EHCI 0:1d.0
+ // EHCI 0:1d.0
Package() { 0x001dffff, 0, 0, 19 },
- // XHCI 0:14.0
+ // XHCI 0:14.0
Package() { 0x0014ffff, 0, 0, 18 },
// LPC devices 0:1f.0
Package() { 0x001fffff, 0, 0, 22 },
@@ -61,9 +61,9 @@ Method(_PRT)
Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
- // EHCI 0:1d.0
+ // EHCI 0:1d.0
Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
- // XHCI 0:14.0
+ // XHCI 0:14.0
Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
// LPC device 0:1f.0
Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 00:22:05 +0000