diff options
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/myst/port_descriptors.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/google/myst/port_descriptors.c b/src/mainboard/google/myst/port_descriptors.c index 6d0d0d6ff9..2c9985c298 100644 --- a/src/mainboard/google/myst/port_descriptors.c +++ b/src/mainboard/google/myst/port_descriptors.c @@ -11,8 +11,8 @@ static fsp_dxio_descriptor myst_dxio_descriptors[] = { [DXIO_WWAN] = { .engine_type = UNUSED_ENGINE, .port_present = true, - .start_logical_lane = 13, - .end_logical_lane = 13, + .start_lane = 13, + .end_lane = 13, .device_number = PCI_SLOT(WWAN_DEVFN), .function_number = PCI_FUNC(WWAN_DEVFN), .link_speed_capability = GEN3, @@ -22,8 +22,8 @@ static fsp_dxio_descriptor myst_dxio_descriptors[] = { [DXIO_WLAN] = { .engine_type = PCIE_ENGINE, .port_present = true, - .start_logical_lane = 14, - .end_logical_lane = 14, + .start_lane = 14, + .end_lane = 14, .device_number = PCI_SLOT(WLAN_DEVFN), .function_number = PCI_FUNC(WLAN_DEVFN), .link_speed_capability = GEN3, @@ -33,8 +33,8 @@ static fsp_dxio_descriptor myst_dxio_descriptors[] = { [DXIO_SD] = { .engine_type = PCIE_ENGINE, .port_present = true, - .start_logical_lane = 15, - .end_logical_lane = 15, + .start_lane = 15, + .end_lane = 15, .device_number = PCI_SLOT(SD_DEVFN), .function_number = PCI_FUNC(SD_DEVFN), .link_speed_capability = GEN1, @@ -48,8 +48,8 @@ static fsp_dxio_descriptor myst_dxio_descriptors[] = { static const fsp_dxio_descriptor emmc_descriptor = { .engine_type = PCIE_ENGINE, .port_present = true, - .start_logical_lane = 16, - .end_logical_lane = 16, + .start_lane = 16, + .end_lane = 16, .device_number = PCI_SLOT(NVME_DEVFN), .function_number = PCI_FUNC(NVME_DEVFN), .link_speed_capability = GEN_MAX, @@ -60,8 +60,8 @@ static const fsp_dxio_descriptor emmc_descriptor = { static const fsp_dxio_descriptor nvme_descriptor = { .engine_type = PCIE_ENGINE, .port_present = true, - .start_logical_lane = 16, - .end_logical_lane = 19, + .start_lane = 16, + .end_lane = 19, .device_number = PCI_SLOT(NVME_DEVFN), .function_number = PCI_FUNC(NVME_DEVFN), .link_speed_capability = GEN_MAX, |